Direct Randomized Benchmarking for Multiqubit Devices

Benchmarking methods that can be adapted to multiqubit systems are essential for assessing the overall or “holistic” performance of nascent quantum processors. The current industry standard is Clifford randomized benchmarking (RB), which measures a single error rate that quantifies overall performance. But, scaling Clifford RB to many qubits is surprisingly hard. It has only been performed on one, two, and three qubits as of this writing. This reflects a fundamental inefficiency in Clifford RB: the $n$-qubit Clifford gates at its core have to be compiled into large circuits over the one- and two-qubit gates native to a device. As $n$ grows, the quality of these Clifford gates quickly degrades, making Clifford RB impractical at relatively low $n$. In this Letter, we propose a direct RB protocol that mostly avoids compiling. Instead, it uses random circuits over the native gates in a device, which are seeded by an initial layer of Clifford-like randomization. We demonstrate this protocol experimentally on two to five qubits using the publicly available ibmqx5. We believe this to be the greatest number of qubits holistically benchmarked, and this was achieved on a freely available device without any special tuning up. Our protocol retains the simplicity and convenient properties of Clifford RB: it estimates an error rate from an exponential decay. But, it can be extended to processors with more qubits—we present simulations on 10+ qubits—and it reports a more directly informative and flexible error rate than the one reported by Clifford RB. We show how to use this flexibility to measure separate error rates for distinct sets of gates, and we use this method to estimate the average error rate of a set of cnot gates.

Figure 1

Illustration of circuits used in Clifford RB and the streamlined direct RB protocol that we propose.

Figure 2

Experimental two- to five-qubit DRB on ibmqx5. (a) Success probability decays. The points are average success probabilities $P_m$, and the violin plots show the distributions of the success probabilities at each length over circuits (there are 28 circuits per length). The curves are obtained from fitting to $P_m=A+B{p}^m$ and $r=(4^n-1)(1-p)/4^n$. (b) Schematic of ibmqx5. Colors match those in Fig. 2 and correspond to the additional qubits (and cnots) added from $n\to n+1$-qubit DRB. (c) Observed $r$ vs $n$, and predictions from one- and two-qubit CRB calibration data. (d) Estimates of the average error rate of the cnot gates in $n$-qubit circuits, obtained by comparing data in Fig. 2 with additional DRB data that used circuits with fewer cnots per layer.

Figure 3

Simulation of DRB and CRB for 2 to 14 qubits with a simple error model. The $n$-qubit DRB error rate is $r\approx n\times 0.15\%$, which is consistent with the simulated sampling-averaged native gate error rate ${\epsilon }_{\mathrm{\Omega }}$.