Single-electron tunneling with slow insulators

The usual paradigm in the theory of electron transport is related to the fact that the dielectric permittivity of the insulator is assumed to be constant, with no time dispersion. We take into account the “slow” polarization dynamics of the dielectric layers in the tunnel barriers in the fluctuating electric fields induced by single-electron tunneling events and study transport in the single-electron transistor (SET). Here “slow” dielectric implies a time scale that is slow compared to the characteristic time scales of the SET charging-discharging effects. We show that for strong enough polarizability, such that the induced charge on the island is comparable to the elementary charge, the transport properties of the SET substantially deviate from the known results of transport theory of the SET. In particular, the Coulomb blockade is more pronounced at finite temperature, the conductance peaks change their shape, and the current-voltage characteristics show the memory effect (hysteresis). However, in contrast to SETs with ferroelectric tunnel junctions, here the periodicity of the conductance in the gate voltage is not broken; instead, the period strongly depends on the polarizability of the gate dielectric. We uncover the fine structure of the hysteresis effect where the “large” hysteresis loop may include a number of “smaller” loops. Also we predict the memory effect in the current-voltage characteristics $I\left(V\right)$, with $I\left(V\right)\ne -I(-V)$.

Figure 1

The equivalent scheme of a single-electron transistor [4].

Figure 2

Graphical solution of Eq. (14) showing three possible solutions for an average grain potential $\langle \varphi \rangle$ at a given gate voltage $V_g$. Parameters are $Q=-0.07\left|e\right|,C_g^{\left(0\right)}=0.5{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0.5$, and $T=0.4E_c^{\left(0\right)}$. The three distinct solutions for $\langle \varphi \rangle$ at a given $Q_0$ correspond to the memory effect instability.

Figure 3

Conductance peaks for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0,0.3,0.6$. The unit of conductance $G_{T1}$ is the conductance of the first tunnel junction of the SET. Parameters are capacitances $C_1^{\left(0\right)}=0.3{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.5{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$, and $C_g^{\left(0\right)}=0.2{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$ and temperature $T=0.2E_c^{\left(0\right)}$. The slow dielectric in the gate capacitor modifies the shape of the conductance peaks but preserves the periodicity in parameter $Q$, in contrast to the SET with a ferroelectric in the gate capacitor [7].

Figure 4

Memory effect instability in the SET with a slow insulator in the gate capacitor. (a) and (b) The conductance branches corresponding to increasing and decreasing $Q$, respectively, and $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0.6,1,2,4$, (c) polarization, and (d) the average grain potential (arrows show the direction of $Q$ evolution for a given branch) for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=4$. Gray lines show stable and unstable branches of polarization and the average potential. Parameters are capacitances $C_1^{\left(0\right)}=0.3{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.5{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$, and $C_g^{\left(0\right)}=0.2{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$ and temperature $T=0.2E_c^{\left(0\right)}$ as in Fig. 3.

Figure 5

Memory effect: (a)–(d) and (f) the conductance for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=1.3,3.3,5.3,10,20$ for stable and unstable branches of Eq. (4) for the average grain potential. (e) The polarization for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=10$. Arrows indicate the positions of hysteresis jumps for a particular branch with increasing $Q$. All plots are shown at fixed temperature $T=0.2E_c^{\left(0\right)}$.

Figure 6

Free energy in Eq. (16) for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0.6,1.3$ and temperature $T=0.2E_c^{\left(0\right)}$. The shape of the free-energy plot is similar to that of the conductance $G\left(Q\right)$ plot in Fig. 5.

Figure 7

Memory effect in (a) the conductance and (b) the polarization of the gate insulator. The red hysteresis loop corresponds to the back and forth change of parameter $Q$ in the interval $(-2,1)$, while the blue curve corresponds to the $(-2,2)$ interval. Parameters are $\mathrm{\Delta }{C}_g=7.5{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},T=0.2E_c^{\left(0\right)}$, while $C_i^{\left(0\right)},i=1,2,g$ and $R_j,j=1,2$, similar to Fig. 3.

Figure 8

(a) Numerical solution for the conductance peak for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0.05$ (blue line); the orange line is the zero-order solution from Eq. (19), and the red line is the first-order solution from Eq. (20). (b) Numerical and analytical solutions of conductance for $\mathrm{\Delta }{C}_g/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0.1$. The first order approximates well the conductance peak at small $\mathrm{\Delta }{C}_g$. (c) Conductance at critical $\mathrm{\Delta }{C}_g$, where hysteresis appears. (d) Conductance hysteresis. (e) Amplitude of conductance peak vs $\mathrm{\Delta }{C}_g$. Points represent the numerical solution, the dashed curve is $G_{\max }=1/2(R_1+R_2)$, and the green solid curve shows Eq. (24) for $G_{\max }$. Parameters are $T=0.06E_c^{\left(0\right)}$, while $C_1^{\left(0\right)},C_2^{\left(0\right)},C_g^{\left(0\right)}$, and $R_{1,2}$ are the same as in Fig. 3.

Figure 9

Current-voltage characteristics $I\left(V\right)$ of a SET with zero gate capacitance, $C_g=0$. (a) $I\left(V\right)$ for $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0.0,0.25,0.5,0.75,1.0,1.25$. Smoother curves correspond to smaller $\mathrm{\Delta }{C}_1$. (b) $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=1.5$. The jumps in $I\left(V\right)$ in (b), (c), (e), and (f) correspond to the memory effect: the branch depends on the direction of the voltage change. (c) $I\left(V\right)$ for $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=3.5$. The $I\left(V\right)$ curve can have many hysteresis loops depending on the amount of electron charge induced on the grain by the dielectric polarization. Insets in (b) and (c) show the details of the hysteresis. (d) $I\left(V\right)$ for $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=1.25,\mathrm{\Delta }{C}_2/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0$ (black curve) and $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=\mathrm{\Delta }{C}_2/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=1.25$ (orange curve); (e) graphs for $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=1.5,\mathrm{\Delta }{C}_2/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=0$ (black curve) and $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=\mathrm{\Delta }{C}_2/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=1.5$ (orange and blue curves). (f) $I\left(V\right)$ for $\mathrm{\Delta }{C}_1/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=\mathrm{\Delta }{C}_2/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}=3.5$. Parameters are $T=0.06E_c^{\left(0\right)},C_1^{\left(0\right)}=0.6{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.4{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$, and $R_i,i=1,2$, similar to Fig. 3. The unit of voltage is $E_c^{\left(0\right)}/\left|e\right|$, and the current is normalized to $E_c^{\left(0\right)}/\left|e\right|R_{\mathrm{T}1}$.

Figure 10

Current-voltage characteristics $I\left(V\right)$ of a SET demonstrating the Coulomb staircase at $T=0,C_g=0$. (a) $I\left(V\right)$ in the regime in which the scaling of the Coulomb staircase steps at large $V$ is the same for slow and fast dielectric responses. Here $R_2/R_1={10}^{-3},C_1^{\left(0\right)}=0.9{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.1{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$. (b) The regime in which the periods of Coulomb staircases for slow (blue curve) and fast (red curve) dielectrics of the same static polarizabilities are different. $R_2/R_1=0.25,C_1^{\left(0\right)}=0.9{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.1{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$. (c) and (d) The shifts of the staircases arising from the hysteretic behavior of $I\left(V\right)$ for a SET with slow dielectrics. Arrows indicate the directions of voltage change for each curve. Here $R_2/R_1={10}^{-3},C_1^{\left(0\right)}=0.7{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.3{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$. The unit of voltage is $\left|e\right|/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$, and current is measured in $\left|e\right|/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}(R_1+R_2)$.

Figure 11

Temperature dependence of the Coulomb staircase in $I\left(V\right)$ characteristics of (a) a regular SET and (b) a SET with slow dielectrics in the tunnel barrier. In (b) the SET parameters are $C_1^{\left(0\right)}=0.7{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},C_2^{\left(0\right)}=0.3{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},\mathrm{\Delta }{C}_1=1.4{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)},\mathrm{\Delta }{C}_2=0$. In (a) $C_1=2.1{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$ and $C_2=0.3{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$. For both plots $R_2/R_1={10}^{-3}$, and in (b) $I\left(V\right)$ is shown for increasing voltage $V$. The unit of voltage is $\left|e\right|/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}$, and the current is measured in $\left|e\right|/{\mathit{C}}_{\mathrm{\Sigma }}^{\left(0\right)}(R_1+R_2)$.