Abstract
Carrying out fault-tolerant topological quantum computation using non-Abelian anyons (e.g., Majorana zero modes) is currently an important goal of worldwide experimental efforts. However, the Gottesman-Knill theorem [1] holds that if a system can only perform a certain subset of available quantum operations (i.e., operations from the Clifford group) in addition to the preparation and detection of qubit states in the computational basis, then that system is insufficient for universal quantum computation. Indeed, any measurement results in such a system could be reproduced within a local hidden variable theory, so there is no need for a quantum-mechanical explanation and therefore no possibility of quantum speedup [2]. Unfortunately, Clifford operations are precisely the ones available through braiding and measurement in systems supporting non-Abelian Majorana zero modes, which are otherwise an excellent candidate for topologically protected quantum computation. In order to move beyond the classically simulable subspace, an additional phase gate is required. This phase gate allows the system to violate the Bell-like Clauser-Horne-Shimony-Holt (CHSH) inequality that would constrain a local hidden variable theory. In this article, we introduce a new type of phase gate for the already-existing semiconductor-based Majorana wire systems and demonstrate how this phase gate may be benchmarked using CHSH measurements. We present an experimentally feasible schematic for such an experiment using a “measurement-only” approach that bypasses the need for explicit Majorana braiding. This approach may be scaled beyond the two-qubit system necessary for CHSH violations, leading to a well-defined platform for universal fault-tolerant quantum computation using Majorana zero modes.
6 More- Received 9 October 2015
DOI:https://doi.org/10.1103/PhysRevX.6.021005
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Published by the American Physical Society
Physics Subject Headings (PhySH)
Popular Summary
Localized excitations known as Majorana zero modes hold great promise for the storage and manipulation of quantum information. These quasiparticles, which are neither fermions nor bosons, are, however, lacking in one important aspect: Their topologically protected manipulations, even when combined with measurement operations, are insufficient for universal quantum computation. A nonprotected (but still well-controlled) operation is necessary to supplement the available protected operations. Here, we provide a model for the practical implementation of such an operation—a single-qubit phase gate—in Majorana wire networks.
Unlike previous proposals, our gate is well protected against errors in timing. We make use of a minimum of six Majorana modes, which are known to exhibit suppressed quantum decoherence. We show that our proposed phase gate may be naturally integrated into a platform for testing whether a system is capable of universal quantum computation through the violation of the Clauser-Horne-Shimony-Holt variant of Bell’s inequality. This test is a basic demonstration of quantum properties. This gate system, which consists only of device elements that are currently available, avoids issues of precise timing and Majorana braiding, the latter of which can be extremely complicated and computationally expensive. Additionally, we purposefully avoid altering any details of the Majorana wire system itself since this technology is still in development and may experience significant advances in the future. We show that this Majorana wire-based platform may itself be generalized to create a universal quantum computer.
We expect that our findings will pave the way for experimental realizations of fault-tolerant topological quantum computation.