Abstract
Hardware-efficient transpilation of quantum circuits to a quantum device native gate set is essential for the execution of quantum algorithms on noisy quantum computers. Typical quantum devices utilize a gate set with a single two-qubit Clifford entangling gate per pair of coupled qubits; however, in some applications access to a non-Clifford two-qubit gate can result in more optimal circuit decompositions and also allows more flexibility in optimizing over noise. We demonstrate calibration of a low-error non-Clifford controlled- phase (cs) gate on a cloud-based IBM Quantum system using the Qiskit Pulse framework. To measure the gate error of the calibrated cs gate we perform non-Clifford cnot-dihedral interleaved randomized benchmarking. We are able to obtain a gate error of at a gate length 263 ns, which is close to the coherence limit of the associated qubits, and lower error than the back-end standard calibrated cnot gate.
- Received 6 August 2020
- Revised 18 October 2020
- Accepted 28 January 2021
DOI:https://doi.org/10.1103/PhysRevResearch.3.013204
Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.
Published by the American Physical Society