Constant-Overhead Quantum Error Correction with Thin Planar Connectivity

Quantum low density parity check (LDPC) codes may provide a path to build low-overhead fault-tolerant quantum computers. However, as general LDPC codes lack geometric constraints, naïve layouts couple many distant qubits with crossing connections which could be hard to build in hardware and could result in performance-degrading crosstalk. We propose a 2D layout for quantum LDPC codes by decomposing their Tanner graphs into a small number of planar layers. Each layer contains long-range connections which do not cross. For any Calderbank-Shor-Steane code with a degree-$\delta$ Tanner graph, we design stabilizer measurement circuits with depth at most ($2\delta +2$) using at most $\lceil \delta /2\rceil$ layers. We observe a circuit-noise threshold of 0.28% for a positive-rate code family using 49 physical qubits per logical qubit. For a physical error rate of ${10}^{-4}$, this family reaches a logical error rate of ${10}^{-15}$ using fourteen times fewer physical qubits than the surface code.

Figure 1

A crossing-free planar layout for hypergraph product codes with four layers. Stabilizer generators are measured using circuits built from single-qubit operations and cnot gates between qubits connected by an edge. The top two layers have edges connecting qubits in the same row as shown in the enlargement, while the lower two layers have edges connecting qubits in the same column. Each layer is planar, such that no pair of edges cross. For comparison, the lower right box shows the nonplanar connections passing through the lower-left corner before the decomposition, which exhibits many crossings.

Figure 2

(a) The Tanner graph of an HGP code is the Cartesian product of two bipartite input graphs. Here qubits are displayed according to their label, which does not correspond to their physical location in the 2D layout. (b) The four possible configurations in which an $X$ and a $Z$ stabilizer can overlap. Red arrows show the cardinal circuit ordering. (c) The commutation of a pair of cnot gates.

Figure 3

The failure rate per round averaged over ten successive rounds of error correction. The dashed lines are obtained using $P_L(p,k)=c_1(p/p_t{)}^{c_2{k}^{c_3}}$ finding fitting constants $c_1=0.64$, $c_2=1.3$, $c_3=0.21$ and the threshold $p_t=2.8(2)\times {10}^{-3}$.