Zero-Energy Modes from Coalescing Andreev States in a Two-Dimensional Semiconductor-Superconductor Hybrid Platform

We investigate zero-bias conductance peaks that arise from coalescing subgap Andreev states, consistent with emerging Majorana zero modes, in hybrid semiconductor-superconductor wires defined in a two-dimensional $\mathrm{InAs}/\mathrm{Al}$ heterostructure using top-down lithography and gating. The measurements indicate a hard superconducting gap, ballistic tunneling contact, and in-plane critical fields up to 3 T. Top-down lithography allows complex geometries, branched structures, and straightforward scaling to multicomponent devices compared to structures made from assembled nanowires.

Figure 1

(a) Device schematic indicating the aluminum leads (gray), InAs 2DEG (yellow), InGaAs barrier (green), and top gate (orange). The insulating layer between the device structure and the electrostatic gate has been omitted for clarity. The tunneling probe location is indicated by the dashed circle. Inset: Band alignment as a function of depth $z$ highlighting the finite confining barrier between the Al and InAs. (b) False colored atomic force micrograph of a lithographically identical device before oxide and gate deposition. (c) Conductance as a function of gate voltage for $B=0$ (blue), $B_{\perp }=0.08\mathrm{T}$ (red), and $B_{\perp }=1\mathrm{T}$ (purple).

Figure 2

(a) Tunneling spectroscopy of the wire for $B=0$ (blue), $B_{\perp }=0.08\mathrm{T}$ (red), and $B_{\parallel }=0.4\mathrm{T}$ aligned along the wire (green). (b),(c) Tunneling spectroscopy of the superconducting gap for the three field configurations in (a). The colors from (a) identify each panel, with arrows indicating the gate voltage location of the traces in (a). A nonlinear color scale is used. (d)–(f) Schematic representations of the three regimes of operation shown in (a)–(c) with relative DOS in the wire (left) and Al plane (right). Superconducting Al is represented in black, white indicates that the Al has been driven normal, and gray that the Al is still superconducting but the induced gap is soft.

Figure 3

(a) Conductance as a function of source-drain bias and parallel magnetic field. The upper color bar schematically indicates, with reference to Fig. 2, the DOS configuration in the wire and under the 2D plane. The color scale used is shared with (c)–(f). (b) Line cuts taken at the points indicated in (a). Curves are successively offset by $2.5\times {10}^{-3}2e^2/h$. (c)–(f) Stability scans as a function of bias and gate voltage at the field positions indicated in (a).

Figure 4

(a) Conductance as a function of bias and in-plane magnetic field orientation $\theta$ for fixed field magnitudes $B_r$. $\theta =0$ indicates a field alignment parallel to the wire. (b) Conductance line cuts as a function of bias for fixed values of the mixing chamber temperature $T_{\mathrm{MC}}$. With decreasing temperature, the ZBP gets sharper and higher. Curves are offset for clarity. (c) Detailed temperature evolution of the ZBP (upper panel), and extracted ZBP height $G_{\max }$ and FWHM as a function of $T_{\mathrm{MC}}$ (lower panel). Note that the vertical axes have logarithmic scales.