Tuning the room temperature nonlinear $I-V$ characteristics of a single-electron silicon quantum dot transistor by split gates: A simple model

We propose an experiment that potentially allows a single-electron silicon quantum dot transistor to operate at room temperature. The emitter and collector of the device consist of silicon quantum wires and the base contains a single silicon dot buried in silicon dioxide. We suggest that split gates are added to the usual experimental situation, to provide additional and variable confinement perpendicular to the transport direction in the emitter and collector regions. The current-voltage curve is calculated using the Bardeen transfer Hamiltonian method. The potential defined by the gates is approximated to a harmonic form. We predict the nonlinear structure in the current-voltage curve, will survive to room temperature for systems with an emitter and collector with dimensions of the order 20–40 nm, and where the harmonic potentials have subband level spacing of the order 4–8.5 meV. Furthermore, we predict that the peak positions and peak to valley ratios in the current-voltage curve can be “tuned” by changing the split gate voltage.