Electronic transport in submicrometric channels at the ${{\mathrm{LaAlO}}_3/\mathrm{SrTiO}}_3$ interface

Nanoscale channels realized at the conducting interface between ${\mathrm{LaAlO}}_3$ and ${\mathrm{SrTiO}}_3$ provide a perfect playground to explore the effect of dimensionality on the electronic properties of complex oxides. Here we compare the electric transport properties of devices realized using the atomic force microscope-writing technique and conventional photolithography. We find that the lateral size of the conducting paths has a strong effect on their transport behavior at low temperature. We observe a crossover from a metallic to an insulating regime occurring at about 50 K for channels narrower than 100 nm. The insulating upturn can be suppressed by the application of a positive backgate. We compare the behavior of nanometric constrictions in lithographically patterned channels with the result of model calculations, and we conclude that the experimental observations are compatible with the physics of a quantum point contact.

Figure 1

(a) Sketch of an AFM-written device. A closeup of the writing area surrounded by metallic electrodes is shown in the inset. The sheet resistance as a function of temperature between 150 and 1.5 K for AFM-written wires of different widths is shown in panels (b) and (c). (b) Two parallel AFM-written wires $10.2\text{−}\mu \mathrm{m}$ long, 140-nm wide, and $1\mu \mathrm{m}$ apart from each other. (c) Three parallel AFM-written wires $10.3\mu \mathrm{m}$ long, 60 nm wide, and $1\mu \mathrm{m}$ apart from each other with (green curve) and without (red curve) an applied gate voltage. The inset shows the evolution of the sheet resistance upon backgate voltage at 35 K. We note that the sheet resistance at 35 K and $V_g=0$ is $\sim 4\mathrm{k}\mathrm{\Omega }$, hence, higher than $R_s$ at 35 K extracted from the red curve. This discrepancy is related to the thermal history of the device: First it was cooled down to 20 K (red curve) and then warmed up again to 35 K where $R_s$ was found to be higher than at the beginning of the process. (d) Optical image of a Hall bar realized with a pattern of amorphous ${\mathrm{SrTiO}}_3$. The channel is nominally $1.5\text{−}\mu \mathrm{m}$ wide and $150\text{−}\mu \mathrm{m}$ long. Panels (e) and (f) show the sheet resistance as a function of temperature between 150 and 1.5 K of two lithographically patterned devices with different sizes. (e) $R_{\mathrm{s}}\left(T\right)$ of a channel $300\text{−}\mu \mathrm{m}$ long and $1.5\text{−}\mu \mathrm{m}$ wide. (f) $R_{\mathrm{s}}\left(T\right)$ of a device $150\text{−}\mu \mathrm{m}$ long, $1.5\text{−}\mu \mathrm{m}$ wide, and containing some constrictions formed by insulating islands in the middle of the conducting region (see Fig. 2). The evolution of the sheet resistance as a function of the gate voltage at 70 K is shown in the inset.

Figure 2

(a) AFM topography of the conducting channel realized with a pattern of amorphous ${\mathrm{SrTiO}}_3$ in correspondence to the constrictions. (b) Phase component of the near-field optical signal measured using a cryo-SNOM at 5 K with an incident light wavelength of $10.7\mu \mathrm{m}$ and the backgate grounded. The insulating regions at the center of the constrictions are labeled by white arrows. The symbols labeled A and B indicate the positions considered to evaluate the phase difference between the wide conducting channel and the insulating region. (c) Phase component of the near-field optical signal with 5 V applied to the backgate. The plots below panels (a)–(c) show a line cut of the topography and the phase component of the near-field signal at ${\mathrm{V}}_g=0$ and 5 V, respectively. The dashed white lines in the main figures indicate the position of the cuts.

Figure 3

(a) Backgate dependence of the total resistance at 50 mK for the device realized with a pattern of ${\mathrm{SrTiO}}_3$. Three datasets have been acquired successively by sweeping the backgate voltage up and down (the arrows indicate the sweeping direction). (b) Gate dependence of the total conductance (for the third sweep only), normalized to the quantum of conductance $2e^2/h$.

Figure 4

Backgate dependence of the conductance increase $\mathrm{\Delta }G=G\left(V_g\right)-G\left(V_g^{\min }\right)$ normalized to $2e^2/h$ acquired at increasing temperatures (a) and increasing magnetic fields at 400 mK (b). The curves have been shifted along the $x$ axis for clarity.

Figure 5

Calculated and experimental values of the conductance of the QPC (in units of $2e^2/h$) as a function of $V_0$ at 50 mK. The numerical calculations were carried out using the saddle-point model for a QPC with $l_x=350$ and $l_y=35\mathrm{nm}$. The experimental conductance has been analyzed as explained in the main text. The gate voltage applied to the device is reported on the top abscissa axis for comparison.

Figure 6

Calculated (solid lines) and experimental values (points) of the constriction resistance as a function of temperature. The calculations have been performed using the model and the parameters detailed in Sec. 4 with $l_x=350$ nm and $l_y=35\mathrm{nm}$. The values of the electrostatic potential $V_0$ used in the calculations are reported in the legend.