Scalable Quantum Circuit and Control for a Superconducting Surface Code

We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tunable transmon qubits with nearest-neighbor coupling. An eight-qubit unit cell forms the basis for repeating both the quantum hardware and coherent control, enabling spatial multiplexing. This control uses three fixed frequencies for all single-qubit gates and a unique frequency-detuning pattern for each qubit in the cell. By pipelining the interaction and readout steps of ancilla-based $X$- and $Z$-type stabilizer measurements, we can engineer detuning patterns that avoid all second-order transmon-transmon interactions except those exploited in controlled-phase gates, regardless of fabric size. Our scheme is applicable to defect-based and planar logical qubits, including lattice surgery.

Figure 1

Layout of a surface-code fabric. Red circles with $D$ labels represent data qubits. Blue (green) circles with $X$ ($Z$) labels represent ancillas performing $X$-type ($Z$-type) quantum parity checks of their nearest-neighbor data qubits. Each check is realized as an indirect quantum measurement, consisting of a coherent step involving pairwise interactions (dashed lines) followed by ancilla measurement. The delineated fabric of nine data qubits ($D_a$ through $D_i$) and eight ancillas ($X_a$ through $X_d$ and $Z_a$ through $Z_d$) constitutes the distance-3 planar logical qubit named Surface 17.

Figure 2

X-type (a) and $Z$-type (b) plaquettes. Data qubits are labeled according to their position relative to the ancilla (NE, northeast; NW, northwest; SE, southeast; and SW, southwest). Standard circuits for measuring $X$-type (c),(e) and $Z$-type (d),(f) stabilizers indirectly using ancillas, using cnot (c),(d) or $\mathrm{CZ}$ (e),(f) as the primitive data-ancilla interaction. The order of two-qubit gates, NE-NW-SE-SW (NE-SE-NW-SW) for $X$-type ($Z$-type) stabilizers, ensures that all data qubits common to adjacent plaquettes do their interactions with one ancilla before the other, and also provides resilience to ancilla errors in Surface 17 [30]. Using the relations $H=Y_{+90}Z=Z{Y}_{-90}$, one can see that the opening and closing $H$ gates can be replaced by $Y_{-90}$ and $Y_{+90}$ rotations, respectively.

Figure 3

Depth-nine quantum circuit for parallelized $X$- and $Z$-stabilizer measurements in Surface 17 using $\mathrm{CZ}$ gates. The six $\mathrm{CZ}$ gates inside each gray box are executed simultaneously. Typical values of gate and readout times are indicated at the top. The bottom arrow represents the looping of QEC cycles. Qubits are labeled as in Fig. 1.

Figure 4

Composing the surface-code fabric by repetition of eight-qubit unit cells. Red and pink circles represent data qubits, blue (green) circles represent ancillas for $X$-type ($Z$-type) stabilizer measurements, and dashed lines represent nearest-neighbor couplings. Dot colors also indicate the frequency for single-qubit microwave control (red for $f_1$, green and blue for $f_2$, and pink for $f_3$). Contours delineate unit cells (with qubits named $D_1$ to $D_4$, $X_1$, $Z_1$, $X_2$, and $Z_2$).

Figure 5

(a) Unit cell quantum circuit for pipelined $X$- and $Z$-type stabilizer measurements. Qubits are labeled as in Fig. 4. Time slots 1–4 (5–8) are for $X$-type ($Z$-type) stabilizer $\mathrm{CZ}$ gates. Time slots $A$ and $B$ ($D$ and $E$) are for $X$-type ($Z$-type) stabilizer single-qubit gates. Time slots $C$ and $F$ allow (optional) operations on data qubits while $X$ ancillas ($Z$ ancillas) are measured during time slots $C$ through $F$ (time slots $F$ through $C$). The bottom arrow indicates the repetition of QEC cycles. Elements in transparent gray belong to the previous or next QEC cycle. (b) Frequency arrangement and detuning sequences for qubits in the unit cell: single-qubit gates on $D_1$ and $D_2$ ($D_3$ and $D_4$) are performed at $f_1$ ($f_3$), while those on ancillas are performed at $f_2$. Ancilla measurements are performed at $f_2^{\mathrm{park}}$. ${\mathrm{CZ}}_f$ gates are performed between qubits at $f_1^{\mathrm{int}}$ and $f_2$ or at $f_2^{\mathrm{int}}$ and $f_3$. No interactions take place at $f_1$ or the parking frequencies $f_2^{\mathrm{park}}$ and $f_3^{\mathrm{park}}$. Small offsets are added to some detuning sequences to clarify the distinction between sequences for $D_1$ and $D_2$, $X_1$ and $X_2$, $Z_1$ and $Z_2$, and $D_3$ and $D_4$.

Figure 6

Alternative frequency arrangement for qubits in the unit cell, with ancillas $X_1$ and $Z_1$ ($X_2$ and $Z_2$) at the outer frequency $f_1$ ($f_3$) and data qubits at the inner frequency $f_2$.