Optimal Qubit Control Using Single-Flux Quantum Pulses

Single-flux quantum pulses are a natural candidate for on-chip control of superconducting qubits. We show that they can drive high-fidelity single-qubit rotations—even in leaky transmon qubits—if the pulse sequence is suitably optimized. We achieve this objective by showing that, for these restricted all-digital pulses, genetic algorithms can be made to converge to arbitrarily low error, verified up to a reduction in gate error by 2 orders of magnitude compared to an evenly spaced pulse train. Timing jitter of the pulses is taken into account, exploring the robustness of our optimized sequence. This approach takes us one step further towards on-chip qubit controls.

Figure 1

Time slicing of the evolution: in each frame, the control amplitude $u(t)$ either has a Gaussian shape (1) or vanishes (0). Therefore, only two unitary operators ${\mathit{U}}_i$ need to be calculated, each with a duration of $2t_c$ (here, 10 ps). The gap between two consecutive pulses is always an integer multiple of $2t_c$.

Figure 2

Bit-string representation of the pulse sequence before (top) and after (bottom) the optimization for a gate time of 20 ns. A vertical black line indicates the time when a pulse is applied, and white space the duration of the free evolution.

Figure 3

Populations of a qutrit starting in the ground (top panel) and excited (bottom panel) state for the optimized sequence (solid lines) and the initial sequence (dashed lines). The population of the leakage level is enhanced by a factor of 10 for better legibility. The algorithm suppresses leakage to the ending gate time.

Figure 4

Starting with a sequence shown in Refs. [12, 22], genetic algorithms are used for optimization. At each iteration, a new population of different pulse sequences is created from their parents, while the best solution of a generation with the lowest fidelity error is kept until either the algorithm finds a better one or a given threshold is exceeded.

Figure 5

The gate errors of the optimizations for different gate times. The widths of the pulses have been kept constant; i.e., the number of pixels changes with the gate time linearly. The horizontal red dash-dotted line is the fidelity error of the initial sequence for 20 ns, and the horizontal black dashed line indicates the stopping condition of the algorithm when a fidelity $>0.9999$ has been reached.

Figure 6

The gate error of the optimized sequence for timing jitters with constant variance (external clock) and linear growing variance (internal clock). The gate errors have been averaged over 1000 runs of the time evolution for each value of $\sigma$.