High-Threshold Code for Modular Hardware With Asymmetric Noise

We consider an approach to fault tolerant quantum computing based on a simple error-detecting code operating as the substrate for a conventional surface code. We anticipate that the approach will be efficient when the noise in the hardware is skewed towards one channel (e.g., phase), or alternatively when the hardware is modular in such a fashion that the local error-detect operations have higher fidelity. We employ a customized decoder where information about the likely location of errors, obtained from the error-detection code, is translated into an advanced variant of the minimum-weight perfect-matching algorithm. A threshold gate-level error rate of 1.42% is found for the concatenated code given highly asymmetric noise. This is superior to the standard surface code and remains so as we introduce a significant component of depolarizing noise; specifically, until the latter is 70% the strength of the former. Moreover, given the asymmetric noise case, the threshold rises to 6.24% if we additionally assume that local operations have 20 times higher fidelity than long-range gates. Thus, for systems that are both modular and prone to asymmetric noise our code structure can be very advantageous.

Figure 1

Schematic view of the surface code and the circuits used for error detection and stabilizer checks. (a) The standard surface code. (b) Our surface-code variant. When concatenated with a two-qubit phase-detection code, each data qubit becomes a logical qubit that consists two physical qubits (plus one ancilla for error detection, though not shown here). Two physical qubits are required to do a $Z$-stabilizer check, and a single qubit is needed for an $X$-stabilizer check. (c) The circuit for an $X$ check, starting with error detection on each qubit. Once an error is detected, a phase gate is applied to either of the two qubits. (d) The circuit for a $Z$ check, where transversal controlled not (cnot) gates are applied. In the end, both the two ancillas are measured and the parity of the four qubits is represented by the parity of the measurement outcomes.

Figure 2

Pairing of ancilla qubits based on spatial locations and potentially faulty qubits. All of the qubits shown are in the higher-level surface code. The ancilla qubits with a change of error syndrome are denoted as the big purple dots. The orange crosses represent data qubits identified as likely to have suffered an error according to the lower-level error-detection code, i.e., they are on the “list” as described in the main text. Two possible pairings are shown in this graph: Q1&Q2 and Q3&Q4, or Q1&Q4 and Q2&Q3, connected by the green and purple curves, respectively. The weights for the connections between two adjacent ancilla qubits with and without the listed data qubits are $w$ and $z$. Therefore, while the algorithm based purely on spatial distance always opt for the first pairing option, the second option gives a lower total weighted distance if $z>3w$.

Figure 3

Increase in noise threshold as we alter the relative error rates for local error detection and global parity check, in a scenario with pure phase errors. The threshold error rate represents the error rate applied for global parity check. A larger ratio leads to an increase of threshold.

Figure 4

Code success rate as a change of the gate error rate applied in the parity-check cycle under the circumstance of pure phase error. The blue curve represents a standard surface code with a size of $20\ast 20$. The orange and yellow curves refer to the concatenated surface code of size $14\ast 14$, with $p_d=p_g$ and $p_d=0.5p_g$, respectively. The code sizes are chosen such to make the total number of physical qubits (almost) the same for the two different codes. The gray dashed lines (from left to right) denote where the threshold is, for the blue, orange, and yellow curves, respectively.

Figure 5

The dependence of threshold on the relative strength of dephasing and depolarizing errors. The “threshold” quantity along the $y$ axis is the total probability of a physical error; each such error is assigned to one of the two possible models with relative probabilities given by the $x$ axis. The purple (brown) curve corresponds to the concatenated code where the gates in error detection have three times the error rate (the same error rate) as the gates in parity check. For reference, the standard surface code is plotted as the green curve.

Figure 6

Dependence of the logical success rate with the physical error rate and the size of the codes for (a) the standard surface code and (b) the concatenated code. The error rate in the error-detection cycle is the same as in the parity-check cycle. The crossing point of the curves defines the threshold of that code. We see that when only phase error is present, the standard surface code has a threshold of around 1.20%, smaller than that of the concatenated code, which is around 1.42%.

Figure 7

Approximate Dijkstra algorithm.