Measurement-Free Fault-Tolerant Quantum Error Correction in Near-Term Devices

Logical qubits can be protected from decoherence by performing quantum error-correction (QEC) cycles repeatedly. Algorithms for fault-tolerant QEC must be compiled to the specific hardware platform under consideration in order to practically realize a quantum memory that operates for in principle arbitrary long times. All circuit components must be assumed as noisy unless specific assumptions about the form of the noise are made. Modern QEC schemes are challenging to implement experimentally in physical architectures where in-sequence measurements and feed forward of classical information cannot be reliably executed fast enough or even at all. Here we provide a novel scheme to perform QEC cycles without the need of measuring qubits that is fully fault-tolerant with respect to all components used in the circuit. Our scheme can be used for any low-distance CSS code since its only requirement towards the underlying code is a transversal cnot gate. Similarly to Steane-type EC, we coherently copy errors to a logical auxiliary qubit but then apply a coherent feedback operation from the auxiliary system to the logical data qubit. The logical auxiliary qubit is prepared fault tolerantly without measurements, too. We benchmark logical failure rates of the scheme in comparison to a flag-qubit-based EC cycle. We map out a parameter region where our scheme is feasible and estimate physical error rates necessary to achieve the break-even point of beneficial QEC with our scheme. We outline how our scheme could be implemented in ion traps and with neutral atoms in a tweezer array. For recently demonstrated capabilities of atom shuttling and native multiatom Rydberg gates, we achieve moderate circuit depths and beneficial performance of our scheme while not breaking fault tolerance. These results thereby enable practical fault-tolerant QEC in hardware architectures that do not support midcircuit measurements.

Popular Summary

Quantum error correction (QEC) is deemed indispensable in order to realize and scale up digital quantum computers that are practically useful. Quantum algorithms must be designed in a fault-tolerant (FT) manner to ensure that the entire system is not flawed by single components passing out because of uncontrolled interaction with the environment.

While it was previously thought that measurements are in practice needed for FT QEC, we present a scheme that performs the entire QEC procedure without having to measure individual qubits. We lay out detailed quantum circuits for the implementation of our scheme into the most commonly used codes in state-of-the-art quantum computing hardware. Although our scheme requires more physical qubits and quantum gate operations than conventional QEC, we find that a beneficial regime could be realized in practice in neutral-atom tweezer arrays.

We therefore provide a promising way to experimentally realize beneficial FT QEC in quantum computing platforms that do not yet support midcircuit measurements and feedback operations conditioned on classical measurement information. Furthermore, it will be interesting to investigate how the scheme generalizes to other and larger-distance QEC codes.

Figure 1

Logical building blocks of the measurement-free fault-tolerant quantum error-correction cycle. Errors on the logical qubit ${|\psi ⟩}_L$ are copied to a logical auxiliary qubit initialized fault tolerantly in the appropriate basis. Then the $a$-bit syndrome is mapped from the logical auxiliary qubit (block $S$) to the second auxiliary block of $a$ physical qubits. For each syndrome-correction pair, we repeatedly reset ($R$) the physical qubits to $|0⟩$, copy ($C$) the syndrome and apply the matching feedback operation $F_{\sigma }$ of Pauli type $\sigma \in \{X,Z\}$. The repetition refers to all $2^a-1$ possible nontrivial syndromes. Instead of qubit reset, one may also supply fresh auxiliary qubits. The copy and feedback can be parallelized to avoid repetition and to reduce circuit depth and thereby the overall duration of the protocol if a larger number of physical auxiliary qubits is available (see Sec. 2b).

Figure 2

Detailed circuit on the physical qubit level of the measurement-free fault-tolerant quantum error-correction cycle for the Steane code. The syndrome mapping (orange) does not require a distinctly FT routine because we perform intermediate reset operations $R$ to the state $|0⟩$ that erase potentially dangerous faults. The control qubits of the feedback gates (green) are conditioned on the physical qubits being in the $|1⟩$ ($|0⟩$) state for a black (white) circle. Any suitable procedure to prepare the logical auxiliary qubits fault tolerantly can be used. We provide a measurement-free FT initialization circuit in Fig. 6. For the last correction operation, copying from the third to the second block can be omitted. One can verify that no single error of any type on any circuit element will lead to an uncorrectable error. (a) $X$-correction block. A single bit-flip error on the logical data qubit, say $X_6$ (red star), is propagated to the logical auxiliary qubit. The sixth physical cnot gate propagates the fault as illustrated by the two subsequent red $X$ markers. For a $Z$ fault, the propagation would happen reversely from the target to the control qubit of a cnot gate. Propagation of $Y$ faults can be viewed as simultaneous occurrence of $X$ and $Z$ faults. Then, the syndrome is mapped to three physical qubits and copied to all multiqubit-controlled feedback gates. The error is corrected by the second ${\mathrm{c}}_3\mathrm{not}$ gate. For the first and all other ${\mathrm{c}}_3\mathrm{not}$ gates the syndrome does not match the control structure. Thus, they have no additional effect on the logical data qubit. Note that, in contrast, for standard Steane-type EC, one would correct $X_6$ by measuring all qubits of the logical auxiliary qubit in the $Z$ basis after the logical cnot gate and applying the feedback conditioned on the measurement result. (b) $Z$-correction block. As required for an FT circuit, single faults within the auxiliary system can never cause more than a weight-1 error on the logical data qubit. As an example, we show the single fault event $Z_{12}{Z}_{16}$ (blue stars), which propagates to a correctable weight-1 error on the logical data qubit through the last ${\text{C}}_3\text{Z}$ gate.

Figure 3

Sketched embedding of the scheme for the Steane code into (a) a neutral-atom tweezer array and (b) a static linear ion trap. For the tweezer array, we show a proposed initial configuration of the atoms. Entangling gates can by applied in parallel to atoms at close range. Between the application of entangling gates, atoms are shuttled to new locations, which we outline in more detail in Fig. 11.

Figure 4

The $X$-correction block of the measurement-free FT QEC scheme can be scheduled in nine time steps (dashed vertical lines) when parallel gate operations and $N^{\prime }=2\times 7+3\times (2^3-1)=35$ physical qubits are available. In the first step, the logical cnot is applied. Then, from time step 2 to 5, the syndrome is mapped to a fresh set of auxiliary qubits. From time step 6 to 8, the syndrome is copied 6 times. In the last time step, the seven feedback operations are applied. It is possible to parallelize the $Z$-correction block analogously.

Figure 5

Utility diagram for measurement-free (MF) EC and flag EC. Regions of advantage based on numerical simulation (markers) and the estimation in Eq. (3) (filled area) are shown in terms of the parameter ratios $p/p_{\text{idle,op}}$ and $p_{\text{idle},m}/p_{\text{idle,op}}$, which approximates $t_{\text{meas}}/t_{\text{ops}}$, with ${\tilde{c}}^2/{\tilde{c}}^{\prime 2}=171041,c\tilde{c}/{\tilde{c}}^{\prime 2}=13471$ and $c^2/{\tilde{c}}^{\prime 2}=1061$ in accordance with Eqs. (E13)–(E16). The lines mark the estimated boundaries between regions of advantage. In the limit of vanishing operation errors, $p=0$, MFEC yields an advantage over flag EC if measurements are at least 400 times slower than operations. The star marker represents the parameters given in Eqs. (4)–(6). At $p/p_{\text{idle,op}}=1$ and $p_{\text{idle},m}/p_{\text{idle,op}}=1$, we use absolute values of $p=p_{\text{idle},m}=p_{\text{idle,op}}={10}^{-4}$ in the numerical simulations.

Figure 6

Circuit to fault tolerantly initialize the logical zero state of the Steane code without measurements. The first eight cnot gates prepare the state non-fault-tolerantly. The subsequent three cnot gates map the logical operator $Z_3{Z}_5{Z}_6$ to a flag qubit that heralds successful preparation (red dotted circles on code graph). The last four cnot gates map the complementary stabilizer $Z_1{Z}_2{Z}_4{Z}_7$ (orange dashed circles on code graph) to a second auxiliary qubit. Only if both measurements yield the $-1$ eigenvalue, the correction $X_7$ is applied via the Toffoli gate (large green circle on code graph). In the end, both auxiliary qubits are reset ($R$). The dangerous fault $X_1$ after the fourth cnot gate (red star) propagates to both auxiliary qubits and triggers the Toffoli feedback (green box). The resulting operator $X_1{X}_3{X}_7$ is stabilizer equivalent to the correctable error $X_5$ via application of $K_2^X$.

Figure 7

Decomposition of the Toffoli gate followed by reset of the control qubits into Hadamard gates $H$, the standard $T,T^{†}$, and cnot gates as well as reset $R$.

Figure 8

Decomposition of a triple-controlled-not gate followed by reset $R$ of the control qubits into a sequence of Hadamard gates ($H$), cnot gates, and $T_8=\exp (-\text{i}(\pi /16)Z)$ gates followed by reset $R$ of the control qubits.

Figure 9

Logical failure rates for the measurement-free (MF) EC scheme compared to conventional flag EC for two logical input states ${|0⟩}_L$ and ${|+⟩}_L$ with a single-parameter depolarizing noise model of strength $p$. The MFEC scheme is compiled into cnot gates. Threshold values for outperforming the physical error rate $p_L=p$ lie at approximately $p=3\times {10}^{-3}$ for the flag scheme and $p=6\times {10}^{-5}$ for the measurement-free scheme, which is a factor of 50 smaller. This is due to the more complicated circuitry, however, the simple single-parameter noise model yields an overly pessimistic estimate for the threshold of the MFEC scheme, as shown in Fig. 10.

Figure 10

Logical failure rates for the measurement-free scheme acting on both logical input states ${|0⟩}_L$ and ${|+⟩}_L$ with multiparameter noise and a scaling parameter $\lambda$ that uniformly varies all physical error rates. Compilation of the scheme into cnot gates is compared to implementations using native multiqubit-controlled feedback operations (NATF) and multi-ion Mølmer-Sørensen gates (MIMS) where applicable. Respective physical error rates are listed in Table 1, $\lambda =1$ corresponds to a two-qubit error rate $p_2=3\times {10}^{-3}$. Depending on the implementation, logical failure rates can vary to up to one order of magnitude. The thresholds for NATF and cnot implementations correspond to two-qubit error rates of approx. $6\times {10}^{-4}$ and $2\times {10}^{-4}$, respectively. For measurement-based QEC, the threshold lies at approx. $3\times {10}^{-3}$ (see Fig. 9), being a factor 5 to 15 higher than in the measurement-free case.

Figure 11

Proposal for the implementation of the measurement-free FT QEC scheme with mobile neutral atoms in optical tweezers. The steps (1)–(9) correspond to the time steps as shown on the left-hand side of this figure and in Fig. 4. Ellipses that encircle sets of atoms correspond to the parallel application of entangling gates. Arrows indicate shuttling moves after the gate executions. Single-qubit gates are not shown.

Figure 12

Measurement-free FT QEC cycle for the distance-3 surface code based on the look up table in Table 3. (a) $X$-correction block with the correctable weight-2 error $X_4{X}_6$ (red stars), which is transformed to $X_4$. (b) $Z$-correction block. Note that 7 (3) out of 10 feedback operations in each block are conditional 3-qubit-controlled (4-qubit-controlled) multiqubit gates.

Figure 13

(a) Recipe how to construct $n$-qubit-controlled-not gates followed by reset ($R$) of the control qubits from cnot gates and single-qubit gates $H$ (Hadamard) and $T_k=\exp (-\text{i}\frac{\pi }{2k}Z)$. It is straightforward to see that the circuit identity in panel (i) holds. Going from an $n$-qubit-controlled-not gate to an $(n+1)$-qubit-controlled-NOT gate followed by reset of the control qubits can be realized by performing the substitution rule stated in panel (ii), where the cnot gate is controlled on the newly added control qubit. Panel (iii) shows the resulting circuit realizing a Toffoli gate followed by reset of the control qubits. If the $n+1^{\text{st}}$ control qubit is in state $|0⟩$, the circuit trivially reduces to the identity. If the $n+1^{\text{st}}$ control qubit is in state $|1⟩$, the circuit reduces to the circuit for $n$ control qubits, which can be seen by employing the identities $T_{2k}^{†}X{T}_{2k}X=T_k^{†}$ and $X{T}_{2k}^{†}X{T}_{2k}=T_k$. (b) Decomposition of a four-qubit-controlled-not gate followed by reset of the control qubits into a sequence of cnot and single-qubit gates. This gate is required to implement the measurement-free error-correction scheme for the surface code, as shown in Fig. 12.

Figure 14

Performing an inverse encoding circuit for the ${|+⟩}_L$ state leaves the $Z$ syndrome $(K_1^Z,K_2^Z,K_3^Z)$ on qubits 4, 1, and 2 of the orange block as indicated, respectively, by the RGB-colored circles. The syndrome mapping step [orange box in Fig. 2] is replaced with the decoding block and the copy and feedback steps are adjusted accordingly. In the absence of noise, each of the four other physical qubits is in the $|0⟩$ state after decoding (dashed white circles).

Figure 15

Parallel measurement of three stabilizers in two sequential steps realizes the flag fault-tolerant circuit for error detection [57]. Due to the interleaved scheduling of cnot gates, all six auxiliary qubits act as measurement and flag qubits at the same time.

Figure 16

Nonflagged circuit to readout all six stabilizers sequentially. Combined with the flag information from the circuit in Fig. 15, this circuit is used for FT syndrome readout.

Figure 17

The Toffoli gate used for the quantum feedback in Fig. 6 can be compiled to multi-ion MS gates given by Eq. (8) and local rotations $R_{\sigma }=\exp [-\text{i}(\theta /2)\sigma ]$ with $\sigma \in \{X,Y,Z\}$ [97]. The first two wires are the control qubits and the third wire is the target qubit. The decomposition is exact. The last $X$ and $Y$ rotations on the control qubits could be omitted in our case due to the subsequent reset.

Figure 18

Circuit to read out the stabilizer $K_1^Z=Z_4{Z}_5{Z}_6{Z}_7$ using two five-qubit MS gates with $\theta =\pm \pi /2$ and single-qubit rotations [78, 96]. The stabilizer eigenvalue is mapped to the last qubit by the gate sequence. To read out the corresponding $X$-type stabilizer, the $Y$ rotations on the data qubits must be omitted.

Figure 19

Compiled circuit with rounded rotation angles that implements the ${\mathrm{c}}_3\mathrm{not}$ gate followed by resetting the control qubits. The first three wires are the control qubits and the fourth wire is the target qubit.

Figure 20

The cost function converged to the target value of $-28$ for the parametrized circuit in Fig. 19.