How to Wire a $1000$-Qubit Trapped-Ion Quantum Computer

One of the most formidable challenges of scaling up quantum computers is that of control-signal delivery. Today’s small-scale quantum computers typically connect each qubit to one or more separate external signal sources. This approach is not scalable due to the input/output (I/O) limitations of the qubit chip, necessitating the integration of control electronics. However, it is no small feat to shrink control electronics into a small package that is compatible with qubit-chip fabrication and operational constraints without sacrificing performance. This so-called “wiring challenge” is likely to impact the development of more powerful quantum computers even in the near term. In this paper, we address the wiring challenge of trapped-ion quantum computers. We describe a control architecture called WISE (Wiring using Integrated Switching Electronics), which significantly reduces the I/O requirements of ion-trap quantum computing chips without compromising performance. Our method relies on judiciously integrating simple switching electronics into the ion-trap chip—in a way that is compatible with its fabrication and operation constraints—while the complex electronics remain external. To demonstrate its power, we describe how the WISE architecture can be used to operate a fully connected $1000$-qubit trapped-ion quantum computer using approximately $200$ signal sources at a speed of approximately $40–2600$ quantum gate layers per second.

Popular Summary

One of the biggest challenges facing the quantum industry is how to wire up the quantum chips as we look to meaningfully scale the size, power, and potential of quantum computers. Today, small-scale quantum computers can (just about) get away with connecting qubits to one or more individual control lines. However, as soon as we look to scale the qubit count, the number of lines to the chip (and thus the number of wires and electrical interconnects) needed to maintain pace quickly becomes unwieldy. It's widely accepted that the solution to the wiring problem is integrating control components into the chips. However, it hasn't been clear how to do this in a way that allows us to build these chips using existing fabrication technology, without taking up too much chip space, consuming too much power, needing too much bandwidth for device control, or impacting the efficiency of the QC as it scales.

We present a solution that allows for wiring trapped-ion quantum computers in a way that's consistent with all of these constraints. Our method—dubbed WISE for Wiring using Integrated Switching Electronics—enables a 1000-qubit device to be run on just 200 control lines using chips and infrastructure that is available today.

Figure 1

An illustration of the standard approach to the electrical wiring of trapped-ion quantum computers. Qubit transport in an $N$-qubit ion trap is achieved by using approximately $10N$ electrodes. Each electrode is wired through an individual filter to an individual DAC. The DAC output waveforms are set through a digital interface, with typical data flow rates of approximately $50\mathrm{Mbit}/\mathrm{s}$ per DAC.

Figure 2

A high-level illustration of the WISE architecture. We form a quantum processing unit (QPU) by combining an ion trap with a switch-demultiplexing network. In this way, all the high-density input/output (I/O) is confined to the QPU and the interface between the QPU and the outside world requires significantly fewer connections. We divide ion-trap electrodes into dynamic ones (green, approximately ten dynamic electrodes per qubits) and quasistatic ones, i.e., “shims” (blue, approximately ten shim electrodes per qubit). The dynamic electrodes are controlled by approximately $100$ DACs, regardless of the system size, due to an integrated switch network. The number of shim DACs is reduced from one DAC per electrode in the standard approach to one DAC per approximately $100$ electrodes in our approach, due to an integrated demultiplexing network. The high-speed digital interface is only required between the controllers and the DACs, while digital communication between the QPU and the controllers requires only small signal bandwidth and can be done serially.

Figure 3

(a) Basic switchable swaps. Two qubits (red) are placed in neighboring linear zones (1,2), shown in green and orange, respectively. Each zone contains $N_{\mathrm{de}/\mathrm{lz}}\sim 10$ dynamic electrodes (the figure shows $N_{\mathrm{de}/\mathrm{lz}}=6$ for simplicity), as well as rf and shim electrodes (not shown). When switches $s_1$ and $s_2$ are set to $(s_1,s_2)=(1,1)$, the zones are “active” and the qubits undergo a swap. If, however, $(s_1,s_2)=(0,0)$, the zones are “inactive” (drawn as partially transparent) and the qubits remain in their original locations. (b) The 1D swap sequence. Two qubits (red) in neighboring linear zones are swapped by bringing them together (shuttling) and merging their potential wells, followed by a crystal rotation, well split, and a shuttle step. At each step, the potential experienced by each ion is the net potential of all neighboring dynamic, shim, and rf electrodes.

Figure 4

An odd swap in a linear 1D array of $N=8$ qubits with $N_{\mathrm{de}/\mathrm{lz}}=6$ dynamic electrodes per zone. In this example, the bit-select word is $s=(1,1,0,0,1,1,1,1)$. Thus, zones $1$, $2$, $5$, $6$, $7$, and $8$ are active (their qubits undergo swaps), while zones $3$ and $4$ remain inactive (their qubits remain stationary). In addition to dynamic electrodes (shown in green and orange for odd and even zones, respectively), rf electrodes are shown in white and shim electrodes in blue.

Figure 5

(a) The 2D qubit-swap sequence. Two qubits in neighboring junctions can be swapped without crystal rotations as a sequence of three shuttling steps. (b) The 2D qubit swap. During a 2D swap, zone $(i,j)$ is active (solid color) if and only if $s_{i,j}=1$, in which case its qubit undergoes a swap operation. In the above image, the ion trap is a regular $4\times 4$ array and the bit-select word $s=(s_{1,1},s_{1,2},\dots ,s_{2,1}\dots ,s_{4,4})$ has length 16. This particular swap step is an odd vertical swap, i.e., zones $(i,j)$ and $(i,j+1)$ undergo a swap if and only if $i+j$ is even and $(s_{i,j},s_{i,j+1})=(1,1)$.

Figure 6

A schematic illustration of a 2D ion trap with $k=6$ qubits per junction. We distinguish four zone types: junction odd (orange), junction even (green), linear odd (green), and linear even (orange). Before and after reconfigurations, qubits are stored in the linear zones in small chains to allow for multiqubit quantum gates.

Figure 7

The sort algorithm for a realistic 2D ion trap with $k=6$ qubits per junction. (A) First, two-qubit chains in linear segments are split in parallel such as to place every qubit in a different zone. (B) Parallel row-wise odd-even sort is used exactly as if the array was regular, rearranging the qubits such that qubits in the same column have unique destination rows. This takes at most $m$ time steps. (C) Parallel column odd-even sort is applied on every $k\mathrm{th}$ qubit in sequence. This takes $k\times n$ time steps [56]. (D) Parallel row-wise odd-even sort is used exactly as if the array was regular. (E) Finally, qubits are remerged into two-qubit chains between linear zones in parallel.

Figure 8

The 2D qubit-array reconfiguration time and error. (a) The approximate worst-case time and number of time steps for reconfiguring a 2D array of qubits in the optimal configuration, assuming a swap time of $t_0=100\text{μ}\mathrm{s}$. (b) The associated memory error, assuming the decoherence error model in Ref. [13].

Figure 9

(a) A schematic illustration of a linear ion trap supporting laser-free transport-assisted gates. Individual qubits (red) are held above a microwave conductor (gray) running along $x$ across all zones. When the current is applied, all qubits experience a position-dependent magnetic field, allowing for transport-assisted gates. (b) A schematic illustration of a linear ion trap supporting laser-based transport-assisted gates. A laser beam is passively split into multiple channels, each delivered to a separate qubit in a separate zone. Once the laser is turned on, the qubits experience a position-dependent laser intensity, allowing for transport-assisted gates.

Figure 10

An illustration of transport-assisted laser-free single-qubit gates using (a) dynamic electrode parallelization and (b) shim demultiplexing. In (a), a switch-select word $s$ selects which zones are active ($s=1$, solid color) and which are inactive ($s=0$, semitransparent). Once the switches are set, a dynamical waveform moves the qubits in active zones to locations where they experience nonzero Rabi frequency $\mathrm{\Omega }$, while qubits in inactive zones are moved to locations where ${\mathrm{\Omega }}_{1q}\approx 0$. Afterward, a current pulse is applied to the central conductor, executing the target operation. Finally, the qubits are returned to their original locations. In (b), the multiplexer is first turned on, setting shim electrodes in different zones to different values (shades of blue). This moves qubits in different locations to different zones, adjusting the Rabi frequency locally. Afterward, the multiplexer is turned off and a current pulse is applied to the central conductor, executing the target operations.

Figure 11

The basic implementation of a dynamic electrode switch network. The bit-select word $s$ is loaded into a serial-to-parallel converter, which connects to a single-pole double-throw switch, selecting whether the electrode is active ($s=1$, solid) or inactive ($s=0$, transparent). The switch is implemented using two transmission gates, each implemented as a pair of transistors.

Figure 12

The implementation of parallel dynamic control. The linear 1D trap (right) is undergoing an odd swap. Each zone consists of dynamic electrodes, shown in green for odd zones and in orange for even zones. Each dynamic electrode is connected through an individual single-pole double-throw switch to one of two DACs. All switches for zone $i$ are controlled by the same bit $s_i$. Electrodes in odd zones are connected either to the DAC group $V_{1,0}$ (if $s_i=0$) or to $V_{1,1}$ (if $s_i=1$). Likewise, electrodes in even zones are connected either to $V_{0,0}$ (if $s_i=0$) or to $V_{0,1}$ (if $s_i=1$). In the above image, the electrode color matches the color of the DAC to which it is currently connected. In this (toy) example trap, there are $N_{\mathrm{de}/\mathrm{lz}}=6$ dynamic electrodes per linear zone and hence $N_{\mathrm{de}/\mathrm{lz}}=6$ DACs per group, for a total of $N_{\mathrm{dDAC}}=4\times N_{\mathrm{de}/\mathrm{lz}}=24$ dynamic electrode DACs.

Figure 13

(a) The basic architecture for shim demultiplexing. Each shim DAC (blue) is connected to one of $M$ possible shim electrodes (blue) via an analog demultiplexer. An input clock controls all the demultiplexers on the chip, selecting whether they are turned on or off. Each shim electrode is connected to ground through an integrated capacitor. (b) Details of the analog-demultiplexer implementation. An $L$-bit register (one for the whole chip) advances $x$ by one every clock cycle. The value of $x$ is sent through a digital demultiplexer and controls a transmission-gate switch, selecting which of the $M=2^L-1$ electrodes is connected to the DAC. When $x=0$, all the electrodes are disconnected and the qubit reconfiguration and/or quantum gates can proceed.

Figure 14

An illustration of the possible electrical wiring of a $1000$-qubit chip. The QPU (right) combines an ion-trap integrated circuit with integrated capacitors and switches and requires a footprint of $8\mathrm{mm}\times 22\mathrm{mm}$ (excluding interconnects). The QPU is controlled using approximately $200$ electrical inputs, delivered from approximately $200$ off-chip sources via wire bonds.

Figure 15

An extended 1D swap waveform. If there are four qubits (two green and two red) at $t=0$, the green qubits undergo a swap, while the red qubits remain stationary. Alternatively, we can think of it as a two-qubit swap waveform: if there are two qubits in green locations at $t=0$, they undergo a swap, while if the qubits are initially at red locations, they remain stationary.

Figure 16

The single-switch implementation of parallel digital control. Initially, two qubits (black) are trapped in two separate zones using two separate waveforms. The initial wells are evolved into double wells in every zone (1a), while local switches $s_i$ are used to select if the qubit in zone $i$ is pushed into the left or the right well (1b), thus selecting if the qubits will undergo a swap once the extended 1D waveform is applied. Steps (1a) and (1b) can be executed simultaneously or sequentially, in any order.