Space-charge and trap-filling effects in organic thin film field-effect transistors

We use a surface-charge formalism to analyze recent measurements of the electrical properties of organic thin films in a planar field-effect transistor (FET) geometry, including the contribution of both injected charge carriers and charge carriers introduced because of doping. In the presence of trapping centers we find that the electrical conduction in the channel can follow a trap-filling transition with increasing gate voltage. This effect, which produces a significant variation in the effective mobility with gate voltage and induces a strong dependence of the apparent threshold voltage on the temperature, has been observed in measurements on organic FETs but its origin had remained unclear up to now. In addition, we find that space-charge effects can explain several features of recent experiments with organic FETs (OFETs) that cannot be described by the conventional FET model, such as the absence of a saturation behavior for higher source-drain voltages, which we assign to space-charge limited conduction near the drain electrode and which becomes the dominant contribution when the source-drain distance is decreased. The formalism that we used for this analysis can be applied to any FET system based on charge-carrier injection in insulators, and it has an intrinsic flexibility that allows easy extension to take into account additional effects.

Figure 1

Schematic structure of the injection-based field-effect transistor (IFET) configuration considered here. $S$ is the source electrode and $D$ is the drain electrode.

Figure 2

Current-voltage $\left(I-V\right)$ characteristics of two surface IFET. The simulation parameters are $C_i=1.76\times {10}^{-4}{\mathrm{Fm}}^{-2}$, $\mu ={10}^{-4}{\mathrm{m}}^2{\mathrm{V}}^{-1}{\mathrm{s}}^{-1}$, $n_0={10}^{20}{\mathrm{m}}^{-3}$, $W=1.5\mathrm{nm}$, $D=100\mathrm{nm}$, $ϵ=3$, $L=3\mu \mathrm{m}$ (a), and $L=25\mu \mathrm{m}$ (b). The curves were plotted with increasing gate voltage of $0\mathrm{V}$ [dashed curve, not visible in (b)], 3, 5, 7, 10, and $15\mathrm{V}$ (continuous curves).

Figure 3

Spatial distribution of surface space-charge along the IFET channel. The device parameters are the same of Fig. 2b with $V_{ds}=33.3\mathrm{V}$ and $V_g=3\mathrm{V}$, but considering $V_0=0\mathrm{V}$. The continuous line represents the surface charge in the “accumulation” region and the dashed line represents the surface charge in the “insulating” region.

Figure 4

Square root of the saturation current as a function of the gate voltage. The device parameters are the same of the Fig. 2b. $Q_t$ was assumed to be $0.0016\mathrm{C}∕{\mathrm{m}}^2$, which corresponds to a total density of traps $N_t={10}^{23}{\mathrm{m}}^{-3}$. The curves were calculated from the numerical integration of Eq. (23) using the exact solution of Eq. (21). The dotted curve was calculated from the conventional model, $I_{\mathrm{sat}}=W_{\mu }{C}_i{V}_g^2∕\left(2L\right)$, and the dashed curve was derived from Eq. (25).

Figure 5

Variation of the mobility $\mu$ with the gate voltage in accumulation regime obtained from the channel’s transconductance method. The continuous line is calculated taking $Q_t=\mathrm{0.000\hspace{0.17em}45}\mathrm{C}∕{\mathrm{m}}^2$ and $\alpha =\mathrm{0.000\hspace{0.17em}12}\mathrm{C}∕{\mathrm{m}}^2$. The experimental data (squares) were taken from Fig. 6 of Ref. 9. The device parameters are $L=50\mu \mathrm{m}$, $W=5\mathrm{mm}$, and $C_i=5\mathrm{nF}∕{\mathrm{cm}}^2$.