Multi-module microwave assembly for fast read-out and charge noise characterization of silicon quantum dots

Fast measurements of quantum devices is important in areas such as quantum sensing, quantum computing and nanodevice quality analysis. Here, we develop a superconductor-semiconductor multi-module microwave assembly to demonstrate charge state readout at the state-of-the-art. The assembly consist of a superconducting readout resonator interfaced to a silicon-on-insulator (SOI) chiplet containing quantum dots (QDs) in a high-$\kappa$ nanowire transistor. The superconducting chiplet contains resonant and coupling elements as well as $LC$ filters that, when interfaced with the silicon chip, result in a resonant frequency $f=2.12$ GHz, a loaded quality factor $Q=850$, and a resonator impedance $Z=470$ $\Omega$. Combined with the large gate lever arms of SOI technology, we achieve a minimum integration time for single and double QD transitions of 2.77 ns and 13.5 ns, respectively. We utilize the assembly to measure charge noise over 9 decades of frequency up to 500 kHz and find a 1/$f$ dependence across the whole frequency spectrum as well as a charge noise level of 4 $\mu$eV/$\sqrt{\text{Hz}}$ at 1 Hz. The modular microwave circuitry presented here can be directly utilized in conjunction with other quantum device to improve the readout performance as well as enable large bandwidth noise spectroscopy, all without the complexity of superconductor-semiconductor monolithic fabrication.

Particularly, for silicon-based spin qubits, fast charge measurements along with spin-to-charge conversion techniques [15,16] have enabled high-fidelity read out in short timescales, fulfilling one of the requirements for fault-tolerant quantum computing [17].In conjunction with high-fidelity one-and two-qubit gates [18][19][20], the demonstrations of simple instances of quantum error correction [21], the operation of a six-qubit processors [22] and the compatibility with advanced manufacturing techniques [23][24][25][26][27], these steps show important progress towards a scalable silicon-based quantum computer [28].
Silicon spin qubits are typically read using dissipative charge sensors like the single-electron transistor (SET) whose bandwidth can be increased to the MHz range by * fer28@cam.ac.uk embedding the device in a high-frequency resonator [29].To minimise the impact of the sensing method on quantum processor layout [30][31][32][33], recent work has focused on resonant dispersive readout methods such as the singleelectron box (SEB) [34,35] and in-situ readout [36,37].Monolithic integration of the device and resonator on the same chip has lead to the highest charge readout rates both for the SEB [38] as well as for in-situ readout [39] due to the reduced parasitics that result in higher operation frequency, quality factor and resonator impedance.Additionally, monolithically integrated resonators have been used to explore circuit quantum electrodynamics with silicon spins [40][41][42].However, monolithic integration poses important fabrication challenges and may interfere with high qubit connectivity.On the other hand, multi-module microwave assemblies, in which the resonant circuitry is fabricated in a separate chiplet to the device [43], offers the flexibility to independently optimize the layout and fabrication recipes for both technologies at the expense of typically lower performance.Recent advances on microwave assembly using inductively coupled superconducting resonators, however, have resulted in values at the state-of-the-art, specially for systems with high device-resonator coupling [44].
In this work, we develop a superconductorsemiconductor multi-module microwave assembly arXiv:2304.13442v2[cond-mat.mes-hall] 2 May 2024 consisting of a Niobium Titanium Nitride (NbTiN) on sapphire superconducting chiplet connected to a fully-depleted silicon-on-insulator (SOI) high-κ oxide transistor housing multiple quantum dots (QDs).The design is optimised to achieve a large internal quality factor Q int of 1600 and a resonant frequency f r of 2.1 GHz.We characterise the sensor sensitivity to dotto-reservoir transitions (DRT) corresponding to the SEB mode of operation, and an interdot-charge transition (ICT) corresponding to an in-situ measurement.We find a minimum integration time [for a signal-to-noise ratio (SNR) of 1] t min of 2.77 ± 0.01 ns and 13.5 ± 0.3 ns for the SEB and in-situ measurements respectively, which come near to the state-of-the-art achieved using monolithic resonators and quantum-limited amplifiers.Furthermore, the performance of the SEB reported here approaches that of the best SET.
Furthermore, we use the large sensitivity of the assembly to characterise interdot charge noise at high frequencies.We find a 1/f dependence over nine decades of frequency up to 500 kHz and a charge noise level of 4 µeV/ √ Hz at 1 Hz.Our result demonstrates a simple method to extend the high frequency end of the spectrum beyond those achieved using qubit measurements [45] and highlights that low charge noise levels can be achieved with high-κ oxides.While our results are based on silicon devices, the microwave module presented here can be readily utilized with any charge-based system to facilitate improved readout performance.

II. RESONATOR DESIGN
In Fig. 1a, we present the equivalent circuit of the hanger mode resonator we use to read quantum devices [29].It consists of the resonator -represented by an inductor (L) in parallel with a capacitance (C p ) and dissipative losses (R) -coupled to an RF line via a coupling capacitor (C c ).The resonator is connected to a load (i.e. the quantum device) which, for QD devices, can be represented as the parallel combination of a variable capacitance (the quantum capacitance, C Q ) and the Sisyphus resistance (R S ) [46,47].
We design the resonator based off previous multimodule approaches [44,48,49] but make two significant improvements: (i) We utilise an on-chip coupling capacitor as well as a spiral inductor to enable independent control of the resonator frequency f r , and the coupling coefficient, β.Further, the planar interdigitated capacitor minimises circuit losses with respect to surface mount components.(ii) We utilise superconducting LC filters on the DC biasing line, instead of surface mount RC filters.We integrate the LC filters on the resonator chip.These reactive filters have been used in monolithically integrated resonators and increase the internal quality factor [50], increasing the charge sensitivity but also reducing the size of coupling capacitor required for impedance matching.Off-chip lumped-element LC circuits have been used in classical electronics using a flip-chip approach for filtering [51,52], and as resonators to study the interaction of photons with spin ensembles [53,54].Additionally, flip-chip has been used to interface distributed microwave circuits (resonators and filters) with silicon QD systems [43,55].
We present the resonator implementation in Fig. 1d.The resonator consists of a spiral inductor (blue dashed rectangle), surrounding an interdigitated coupling capacitor (green dashed rectangle).We utilize the spiral side of the capacitor to connect to devices (resulting in a parallel configuration with the resonator) while we bond the other side to the RF input line.We route the outer end of the inductor to an LC filter (pink dashed rectangle) used to provide an RF ground while allowing DC signals to be applied.The LC filter consists of an interdigitated capacitor to a ground plane on the sapphire chip, as well as a spiral inductor (L filt ∼ 300 nH, C filt ∼ 1 pF).All components are made of 80 nm NbTiN on Sapphire with a critical temperature of 12.5 K and a kinetic inductance of 2.6 pH/□ commercially fabricated by STAR Cryoelectronics.For specifics on the dimensions of the individual resonator component see Appendix A.
To quantify the improvement provided by the addition of the LC filter to the resonator assembly, we connect the resonator by wire-bonding to a p-type FDSOI nanowire transistor of large dimensions (10 µm wide × 120 nm long × 8 nm high) to simulate a variable load impedance.For an image showing the wire-bonded setup, see Appendix B. The device has the same gate stack as the QD devices to be studied later: a 1.3 nm equivalent oxide thickness of high-κ HfSiON gate dielectric and a combination of 5 nm thick TiN and 50 nm polycrystalline silicon layers as the gate metal.We then characterise the resonance using a vector network analyser (VNA) inside a pumped helium system at 2 K.We measure the resonator assembly in two different configurations and compare the results: (i) DC bias applied through the LC filter (orange dashed square) and (ii) DC bias applied through a surface mount RC low pass filter (C = 100 pF and R = 10 kΩ) bonded to the load side of the inductor (effectively bypassing the LC filter).We plot the magnitude (Γ) and phase of the reflection coefficient in the two resonator configurations in Fig. 1b and c (pink and blue traces, respectively).From the plots, we extract the loaded and internal quality factors for case i(ii) of Q = 394(181) and Q int = 900(280), respectively.We observe an improvement of a factor of ∼ 3 indicating the positive impact of the LC filter in reducing internal losses.Furthermore, although not represented in the plot, we note a higher resonance with the LC filter (2059 MHz vs 1880 MHz) which can be attributed to the filter capacitance C f resulting in a reduction in the effective inductance of the resonator, area, and hence loss, of the transistors used in this preliminary study and (ii) the TiN layer of the gate stack turning superconducting at ≈ 1 K.

III. DISPERSIVE INTERACTION
In this Section, we explore the dispersive interaction between the microwave resonator and QDs in a silicon nanowire transistor, see Fig. 2a.We select a resonator with an effective L of 31 nH, a C c of 40 fF and a C p (including that of the silicon chiplet) of 140 fF resulting in a resonance frequency of 2116 MHz and a resonator impedance Z r = 470 Ω.We connect the resonator to a single gate SOI nanowire transistor with a channel width of 120 nm, a length of 60 nm and height of 8 nm, and a Boron channel doping density of 5 • 10 17 cm −3 .We use additional LC filters (part superconducting chiplet) on the source and drain electrodes.We use the backgate voltage V bg as well as the top-gate voltage V g to bias the device to an ICT between a corner dot [56,57]  and a Boron acceptor with overall charge configurations (N+1 D , 0 B ) to (N D ,1 B ), see Fig. 2b.Here, we plot the normalised resonator phase shift.Besides, we see signal at the DRT of the corner dot.We choose this voltage region for its low charge noise.
We characterise the ICT and DRT at the measurement points indicated by the dashed lines and find gate lever arms α ICT = 0.53 ± 0.03 and α DRT = 0.72 ± 0.03, extracted from Landau-Zener-Stückelberg interferometry [58,59].We extract the tunnel coupling and tunnel rate of the ICT and DRT, respectively from their transition linewidth [46,60] and obtain 2t c /2π = 15.6 ± 0.4 GHz for the ICT and Γ/2π = 10.2 ± 0.2 GHz for the DRT.
Next, in Fig. 2c,d, we measure the resonator's dispersive shift induced by the ICT and DRT.To vary the detuning from the charge transition point, we change the top gate voltage.We fit the resonance at each point in detuning to extract the resonant frequency f r and line-width, κ.Away from the charge transitions, we extract a bare resonator frequency of f 0 = 2.116 GHz with linewidth κ/2π = 2.5 MHz (κ int /2π = 1.05 MHz).We find a frequency shift of 1.8 MHz for the ICT and 5.6 MHz for the DRT.Further, for the ICT, we extract a coherent coupling rate g 0 /2π=168 MHz, a charge decoherence rate of γ/2π=1.45GHz and a tunnel coupling 2t c /2π=17.7 GHz that closely matches the value extracted from lineshape analysis.Charge decoherence rates, γ/2π, in the range 1-10 GHz have previously been reported in silicon nanowire transistors like the one studied here [44,59,61,62].For more details on the extraction of parameters from these fits, see Appendix E.
In both cases, ∆f is of the order of κ which is the condition for maximum state visibility (∆f /κ/2π = 0.72 for the ICT and 2.24 for the DRT) [44].We exploit this regime for fast readout.

IV. MEASUREMENT TIME: DRT AND ICT
We now characterise the dispersive readout performance on the DRT and the ICT.To quantify the performance, we utilize the power SNR of the transitions at a given integration time, t meas .The measurements at the DRT represent the expected charge readout performance of a SEB [11,34,[63][64][65] while the measurements at the ICT are equivalent to the expected charge readout performance in Pauli-spin blockade-based schemes [66][67][68][69][70].
To extract the signal, we measure the difference in the IQ resonator response on and off the DRT (or ICT) peak.We first tune the device on (off) the measurement point, followed by a wait period (100 µs) much longer than the bandwidth of the DC line to stabilise the gate voltage and pre-condition the resonator, removing effects due to resonator ring-up.We then integrate the response for t = t meas .We present the results in Fig. 3a where we plot a 2D histogram of the outcome of 1000 measurements where the IQ signal has been integrated for 100 ns.We observe two well-defined Fresnel lollipops with 2D standard deviation σ on(off) which allows defining the SNR, We note that at low integration times, as in panel (a), the noise level for both states is equal and set by the cryogenic amplifier.Next, in Fig. 3b, we explore the dependence of the SNR with t meas .To do this, we measure the signal using a sampling rate of 250 MHz (4 ns per point) with a total measurement time of 4 µs, to measure the low end of the t meas range, followed by a second measurement with a sampling rate of 5 MHz and total measurement time of 500 µs that covers the large t meas range.We then use a moving average to generate data at various effective t meas .Each data point is composed of 1,000 shots on and off the ICT and DRT.We see that at low t meas , the SNR follows the expected linear relationship for white noise-dominated data set by [71] where t 0 relates to the bandwidth of the measurement set-up and t min corresponds to the integration time for SNR = 1 (at large measurement bandwidth) which we used as a characteristic figure of merit [29].Besides, ζ is determined by the noise type with ζ = 1 corresponding to white noise and ζ < 1 for pink and red noise.
At high t meas (red regime Fig. 3b), the data deviates from the linear trend and the SNR increases at a lower rate, characterised by ζ < 1.This can be explained by a transition from white noise to 1/f η noise-dominated spectrum with a corner frequency around 1 MHz, see Appendix F showing the distortion of the on-state Fresnel lollipop due to excess noise.At very low t meas (pink regime Fig. 3b), we also find a deviation from the linear trend which can be attributed to a finite bandwidth of the measurement setup on the order of t 0 ∼ 2 ns, matching well the bandwidth of the IQ demodulator at 275 MHz.At the fastest readout time achievable by our measurement setup (4 ns) we find an SNR of 1.88 (0.32) for the DRT (ICT).
By fitting the low t meas regime to Eq. 2 with ζ = 1, we extract a t min = 13.5 ± 0.3 ns for the ICT and t min = 2.77 ± 0.01 ns for the DRT.To our knowledge, the DRT readout figure represents the lowest reported using a multi-module assembly and approaches the best reported values for monolithic resonator integration (1.8 ns [38]) and SET readout (0.625 ns [72]).The ICT figure also comes near to those reported in the literature [44,73].
Additionally, in panel b, we plot the measurement infidelity, i.e. the likelihood of mislabelling the state of the system.The electrical infidelity is directly related to the SNR via, where F E and I E are the electrical fidelity and infidelity respectively and erf is the error function.We achieve an electrical infidelity of 10 −4 at 53 ± 7 (280 ± 70) ns for the DRT(ICT).Similarly, we achieve an infidelity of 10 −8 at 0.12 ± 0.03 (0.6 ± 0.2) µs for the DRT(ICT).We stress that this is the electrical infidelity corresponding to electrical readout errors associated to the quality of the sensor only.When used for qubit state read-out, state decay (T 1 processes) can also introduce readout errors [74].
In any case, for a given T 1 , a shorter measurement time reduces the likelihood of state decay and therefore improves fidelity.Using t min as a figure of merit for comparison [29], we now characterise the read-out performance against measurement power and frequency (Fig. 3c and d).For the measurement power, we find t min decreases for increasing power until it reaches a minimum at -100 dBm and -105 dBm for the ICT and DRT, respectively.This trend can be explained by noting that the signal strength is proportional to the number of photons populating the resonator.However, at intermediate powers, photon backaction causes a broadening of the line-width which reduces the dispersive frequency shift on the resonator, reducing the difference between the on and off states [75].Finally, at high powers, the large driving induces increased kinetic inductance and losses in the resonator, decreasing its quality factor and therefore reducing its

sensitivity (see. Appendix G).
Next, in Fig. 3d, we measure t min as a function of frequency and fixed power (below power broadening levels).Under these conditions, the frequency shift caused by the charge transition is that shown in Fig. 2c.We find that t min exhibits a plateau, where its value is minimum, within the frequency range between the bare and loaded frequency of the resonator, a frequency bandwidth of the order of ∆f .We note that when applying higher powers, close to the optimal, ∆f decreases and therefore narrows the optimal frequency window.The optimum read-out frequency for high power narrows down around the bare resonance frequency (Cochrane et al. in preparation).

V. CHARGE NOISE MEASUREMENTS
Having characterised the large SNR of the resonator, we now utilize it to determine the charge noise spectrum of the device.Particularly, we study charge noise at the ICT.Charge noise results in time-dependent variations of both the detuning and tunnel coupling between QDs impacting the fidelity of qubit operations [45].Understanding its magnitude and frequency dependence is hence of high relevance to determine device quality.Charge noise is typically characterised in terms of the detuning noise spectral density (S ϵϵ ) which follows a power law dependence given by where √ S 0 is the characteristic charge noise at 1 Hz and the exponent η is typically around 1 with values ranging between 0.5 and 2 [76].The power law dependence arises by considering an ensemble of two-level fluctuators (TLFs) with a uniform distribution of activation energies and interactions between them.Typically, charge noise is measured in the frequency range around 1 Hz and quoted in terms of the characteristic value √ S 0 .However, measuring charge noise at high frequencies is essential to determine whether the power law observed at low frequencies extends to the regime at which qubit operations occur.Here, we utilize the resonator to cover charge noise over 9 decades of frequency extending up to 500 kHz, see Fig 4 .To cover the frequency range, we utilize two methods: peak tracking and voltage spectroscopy [77].
Peak tracking (bottom left insert) operates by repeatedly measuring the voltage at which the peak of the charge transition occurs.The voltage noise spectral density (S V V ) is then translated into the detuning noise spectral density by using the ICT lever arm: S ϵϵ = α 2 ICT S V V .We use peak tracking to cover the range 10 −4 to 10 1 Hz.Voltage spectroscopy (top right insert) quantifies the voltage signal fluctuations at a fixed detuning point, in this case the signal in quadrature (Q) at the point of highest derivative.The detuning noise spectral density can then be calculated as S ϵϵ = α 2 ICT S QQ /(∂Q/∂V g ) 2 where S QQ is the quadrature voltage noise spectral density.We use voltage spectroscopy in the regime from 10 0 to 10 5 Hz.
Finally, we measure the resonator and measurement setup noise in the same way as voltage spectroscopy, however this time we detune the device away from any charge transitions.In order to compare this to the charge noise data we transform the data using the same conversion to report an equivalent S ϵϵ (see grey trace in Fig. 4).We find this noise to be well below the recorded S ϵϵ for all but the highest frequencies.
We fit Eq.H1 to the peak tracking and voltagespectroscopy data.We include a functional modification to the equation to account for aliasing due to finite sampling rate that becomes apparent as an upward bend at the high frequency end of both datasets (See Appendix H).We find a charge noise of 3.9(4.0)µeV/ √ Hz and exponent of 0.99(0.99)for the peak tracking (voltage spectroscopy) method.In the low frequency regime of the peak-tracking below 10 −2 Hz the charge noise drops off which may be due to the dominant effect of one or more TLFs with characteristic frequency below 10 −2 Hz.Similar results have been reported in the literature [24,78,79] although further investigation would be necessary to confirm it in this device.We recall that the measurement location was partially chosen due to its low charge noise.We additionally measure charge noise at other combinations of gate and back-gate voltages of the device (not shown) and find √ S 0 values in the range of 4.0 -10 µeV/ √ Hz.The charge noise figure demonstrated here is larger than the state-of-the-art for an MOS structure (0.61 µeV/ √ Hz [24]) but is within the values reported for other SiO 2 -only oxide nanowire transistors and below the figure in the few-electron limit [79].We highlight that the oxide in our sample is composed of 0.8 nm SiO 2 and 1.9 nm HfSiON.Such high-κ dielectrics have been associated with a high oxide trap density which could negatively impact the charge noise figure [57].Our result demonstrates that high-κ oxides are not necessarily worse than SiO 2 -based devices while they provide tighter control of the QD electrostatics manifested in the large gate lever arms reported for high-κ technology [48,80].
With the high SNR demonstrated here and the combination of the two methods, we cover the charge noise spectrum over 9 decades of frequency up to 500 kHz, an upper frequency range comparable to qubit operation rates.Previous work measured charge noise over 5 decades and up to 1 Hz using a combination of current spectroscopy, peak-tracking and variations in charge dephasing exchange control experiments [77].Struck et al. [76] measured the charge noise of an SET over 9 decades of frequency up to 10 kHz using current spectroscopy.Finally, CPMG methods have been used to study the impact of charge noise on qubit properties for frequencies up to 320 kHz [45] and 2 MHz [81].Overall, our work demonstrates an easy to use method to study charge noise at the important high frequency end which is relevant to individual qubit operations and directly at the ICT without the need of separate charge sensors that may contribute to the charge noise figure.Besides, our approach may facilitate device quality characterisation and setup noise debugging at high frequencies without the need to resort to qubit measurements.

VI. DISCUSSION
In this Article, we have achieved state-of-the-art charge readout rates utilizing a multi-module microwave assembly.To facilitate the discussion of our results, we will introduce the dependence of t min with system variables as calculated for small dispersive signals and large tunnel rates [11], where T n is the noise temperature.
First of all, with the capacitively coupled microwave assembly, we have looked to comparatively increase the resonator frequency f r over other multi-module approaches while keeping control over the external coupling, β.Secondly, we have introduced an integrated LC filter on the gate line to increase the quality factor of the resonator and obtained an improvement in Q (Q int ) by a factor of 2.2 (3.2).Our data follows a similar trend to results on high frequency (6-8 GHz), high-impedance (∼ kΩ) distributed wave-guide resonators [50,82] that showed an improvement of one order of magnitude.To understand the lower improvement factor, we refer to the expression of the microwave photon leak rate through the DC lines (κ DC ) [82,83]: , where Z DC the impedance of the DC line and C DC is the capacitance from the resonator to the DC line.The aim of the LC filter has been to reduce the Z DC a microwave photon experiences towards the DC line.The comparatively lower improvement in our case could be attributed to the lower f r and Z r , making κ DC a less prominent loss mechanism.
To benchmark our results against the reports in literature, we use the figure of merit of t min .We note that the metric is load aware due to the lever arm, α (see Eq. 5).Across the field, there are large differences in α ranging from values close to α ≈ 1, particularly thin SOI devices [48], to much smaller values α ∼ 0.1, for example, in Si/SiGe quantum wells [22].To facilitate a resonator-only comparison, we suggest an additional load-agnostic metric: t α = t min α 2 .This choice of metric has two benefits: (i) It allows a better comparison of read-out performance of different resonator across different platforms and (ii) it gives a tool to estimate how well a particular superconducting chiplet would perform on a different quantum system.In Table I, we show a nonexhaustive list of reflectometry based read-out results of QD systems extracted from the literature.
First of all, we see that both the SEB and in-situ readout demonstrations in this Article perform near the stateof-the-art in terms of t min .Besides, we note that, in our work, t α at the DRT and the ICT differ by a factor of about 2.6.This difference, not captured in Eq. 5, could be attributed to the increase in photon loss rate at the DRT (∆κ = 1.8 MHz) compared to the ICT (∆κ = 0.15 MHz), which can be understood as a resistive component to the signal, adding on top of the capacitive one.
While both the SEB and in-situ readout results display t min approaching the state-of-the-art, a comparison through t α shows that on-chip microwave resonators are ultimately a better choice in terms of enabling high measurement rates for a given technology.This can be particularly appreciated in the SEB results in SiGe [38].The confined geometry, use of high quality substrates and the use of high kinetic inductance materials in these systems enables a higher frequency, Q and impedance.
However, the impact of the footprint of on-chip resonators have on quantum processor topology is not negligible and they come with the additional complexity of hybrid superconductor-semiconductor fabrication.
There is significant room for improvement for multimodule microwave assemblies.High kinetic inductance materials such as Titanium Nitride [85] and granular Aluminium [86] could be used to further reduce the footprint of the resonators, reducing the parasitic capacitance and therefore increasing their impedance and frequency.
Additionally, the use of a Josephson Parametric Am-plifier (JPA) could further improve readout of the microwave-assembly studied here.For example, we note that in-situ readout results with on-chip resonators have only reported a higher performance when in conjunction with a Josephson Parametric Amplifier (JPA) which has the role of reducing T n [73].In this context, a JPA in conjunction with the multi-module microwave assembly presented here could result in a reduction factor of ≈ 20 in t min , given the typical noise temperature of state-ofthe-art cryogenic amplifiers (T n = 2.5 K) and the frequency and temperature (T = 100 mK) of operation of our system.Finally, we also benchmark our results against the most sensitive charge sensor to date: the rf-SET.Particularly, we see that the SEB demonstrated here (t min = 2.77 ns) approaches the best result for the SET, 625 ps [72], supporting the idea that dispersive readout methods could be as sensitive as dissipative ones [11].In more detail, it was recently theoretically proposed that the signal generated by the single-electron AC currents in the SEB, when driven at high frequencies, could become of the order of the large single-electron currents flowing through SETs, resulting in comparable sensitivities under the same system noise levels.Furthermore, it was proposed that JPAs could reduce the noise levels more efficiently in dispersive systems given that the ultimate noise source, the Sisyphus noise [87], can be made smaller that the SET's shot noise.The results in this Article support this theory and encourage further measurements combining high-frequency strongly-coupled SEBs in conjunction with quantum-limited amplification.We also note that progress in dispersive readout methods over SETs would benefit the development of compact quantum processor topologies.In particular, dissipative charge sensors like the SET require three physical contacts additional to the qubit to be sensed, whereas the SEB just requires two.In the case of in-situ readout only the two electrodes controlling a double QD system are needed to implement the method.

VII. CONCLUSION
In conclusion, we have shown the design of a multimodule resonance circuit containing an integrated capacitive coupling element, a spiral inductor and LC low-pass filters to the bias lines.We use the resonant module in conjunction with a Si-nanowire transistor to achieve a resonance frequency and Q int in excess of 2 GHz and 2000, respectively.We detect QD DRTs and QD-Boron ICTs and operate these as SEB and in-situ dispersive readout, respectively.We find a large SNR resulting in the lowest so far reported t min for dispersively detected charge sensors using a multi-module assembly and approaching the state-of-the-art t min of the monolithically integrated resonators and that of the SET.Finally, we use the large SNR to measure the charge noise of the ICT over 9 orders of magnitude up to 500 kHz using  I. Minimum measurement time comparison of reported charge sensors in the literature.† tmin was not reported but the amplitude SNR was reported at a different integration time and tmin was calculated assuming SNR= (tmeas/tmin) 1/2 .*α was not reported but as an estimate α from a similar system and the same group but different paper was used [84].x α not directly given in the paper but calculated from the FWHM and Γ supplied.
purely voltage spectroscopy.This work pushes the limits of charge sensitivity using dispersive readout and provides a transferable platform to improve the sensitivity of other charge-based quantum systems.The improvement in read-out sensitivity will directly impact the achievable read-out time and state fidelity of semiconductor spin qubit systems helping in the development of a faulttolerant quantum computer.
In this section, we discuss the design of the inductance and capacitance values of the superconducting resonator and how these translate into its physical dimensions.Given an estimate of the parasitic capaci- tance on the load chip of the order of 200 fF, we targeted inductances on the order of 20-40 nH to achieve a f r ≈ 2 GHz.Given an estimate of parasitic losses of the circuit between 0.1 -1 MΩ we calculated the required coupling capacitor for the matching condition In order to estimate the inductance and capacitance of the various circuit elements, we used AWR Microwave Office, a finite element RF simulator, to simulate the elements before fabrication.We designed spiral inductors with an elongated middle section to create space for the coupling capacitor (see Fig. 5a).There are no simple, analytical equations for the inductance of such spiral inductors.Nevertheless, the inductance can be guided by equations for circular spiral inductors, namely L ∝ n 2 d where n is the number of turns and d is the diameter [88].In our designs, we fixed the inner diameter to 200 µm with a horizontal elongation of 200 µm and used n as a tuning parameter to select the inductance.
For the coupling capacitor and filter capacitor, we made use of interdigitated capacitors (Fig. 5a and b).The capacitance of these can be predicted using conformal mapping techniques [89].For design purposes, it is useful to note that the capacitance is approximately linear with the number and length of fingers of the capacitor.To keep the designs between resonators with different C c as similar as possible, we fixed the finger length to 50 µm and varied the number of fingers between 4 and 16 to achieve a capacitance of 10-40 fF.For the filter capacitor, we set the finger length to 100 µm instead and used 100 fingers on either side of the capacitor to get to a capacitance of ≈ 1 pF.
A final set of parameters are the track width (w) and separation (s).In general, lower values of w and s make the designs smaller leading to lower parasitic capacitances to ground and smaller footprints, however they can also make fabrication more challenging and increase capacitance between adjacent turns of the inductor.Finally, if there are impurities in the substrate these can couple more strongly with confined electric fields between features with smaller s and therefore reduce the Q of the resonator.For our designs, we chose 3 µm for w and s.For a capacitively coupled resonator with a filter capacitor behind the inductor (Fig. 7a), it can be shown that in the limit of the negligible resistances the resonance frequency, ω r , is given by where L, C c , C, C f ilt are the inductance, coupling capacitance, resonator capacitance and filter capacitance respectively.Noting that the resonance frequency without C f ilt is given by the first term, we can see that the resonance frequency is corrected upwards by a factor depending on how large the filter capacitance is with respect to the bare capacitance of the circuit.Intuitively, this can be understood by analysing the impedance of the inductor in series with the filter capacitor (Fig. 7b) and therefore calculating an effective inductance given by Inserting Eq.C1 at resonance when ω = ω r this simplifies to: ) where the approximation holds for C f ilt ≫ C + C c .We have shown that C f ilt introduce a correction term to ω r which can be understood as a reduction of the effective inductance of the resonator.

Vbg (V)
ΔΓ / Γ In the case of the ICT, the frequency shift can be modelled by a dispersive shift caused by a charge qubit onto the resonator described by the Hamiltonian [44]: where ∆ 0 = ω 0 −ω is the frequency detuning from the resonance frequency ω 0 , ∆ = Ω − ω 0 is the resonator-qubit detuning with the qubit frequency Ω, g eff = g 0 2t c /Ω is the effective charge coupling rate.The shift in resonance frequency and κ * are given by where ω r is the shifted resonance frequency as a function of detuning, κ is the bare photon loss rate and and γ is the charge qubit decoherence.These equations allow us to fit the dispersive shift of the ICT on the resonator from the signal reflected by the resonator.Due to standing waves in the reflected magnitude which made fitting difficult, we instead fit the phase as this is known to give a reliable extraction of ω r and κ * [90].The phase response of a resonator is given by: where ϕ 0 is a constant phase offset.
Combining equations E2 to E4, we use Bayesian inference to extract the parameters of interest from the phase data.Each parameter is treated as a random variable with a prior distribution and Markov Chain Monte Carlo (MCMC) sampling is used along with the likelihood of the experimental data to sample from the posterior distribution of those parameters [91,92].This provides us with an accurate estimate of the true uncertainty associated with these parameters based on our results [93][94][95].Using this method, we find g 0 /2π = 168 ± 0.7 MHz, 2t c = 17.7 ± 0.1 GHz and γ/2π = 1.45 ± 0.1 GHz.We plot the phase data along with its fit in Fig. 9c and d.
To benchmark the fit we additionally extract κ * and f r from line-cuts of the phase data at fixed detuning by fitting to equation E4 (example fit see Fig. 9a).The phase change of ∼ 360 degrees is characteristic of an overcoupled resonator.We plot the extracted κ * and f r as well as those predicted by the Bayesian inference to the full phase data in Fig. 9b and find them to be in good agreement.There is significant noise in the extracted κ * which we attribute to charge noise causing discrete detuning shifts (this is also observable in the sharp lines in Fig. 9c).Appendix F: Effect of charge noise on Fresnel blobs

I (AU) Q (AU) Counts
In the high t meas regime of the SNR measurements (Fig. 3b), we see a reduction in the rate of increase of the SNR.This can be attributed to a change in the noise characteristic of the measurement, changing the exponent in Eq. 1.At low t meas the noise is white noise (cryogenic amplifier), leading to a noise power dependence of N ∝ 1/t meas arising from sampling from a normal distribution around a mean, and therefore a SNR ∝ t meas .At large t meas , excess noise manifest reducing the SNR.This can be demonstrated by plotting the Fresnel blobs of a measurement at large t meas (Fig. 10).Note how the onstate measurement, being detuning dependent, shows a significant elongation of the blob while the off-state blob remains mostly unaffected.
The two main sources of added noise are due to detuning (ϵ) and tunnel noise (Γ or ∆ c ). Changes in detuning shift the measurement point away from the centre of the peak which reduces the signal.As the slope of the signal with detuning is zero at ϵ = 0 (see Fig. 4 upper right insert), the signal is to first order insensitive to detuning noise.Tunnel noise can couple directly into the signal by changing the peak height, however is often less severe.Coincidentally, voltage spectroscopy is also sensitive to tunnel noise and therefore the difference in the noise characteristic from peak tracking (3.9 µeV/ √ Hz) and voltage spectroscopy (4.0 µeV/ √ Hz) can be used to demonstrate this.
Appendix G: Kinetic inductance and losses introduced in resonator by large RF driving power At large driving powers, breaking of Cooper pairs can lead to an increased kinetic inductance as well as additional losses in the resonator.The kinetic inductance shifts the resonance frequency down, while the losses reduce Q int and therefore reduce the coupling constant β.
To analyse this effect we measure the frequency spec- trum of the resonator near the ICT as a function of power.We plot f r , β, Q int and Q ext in Fig. 11.Additionally, we also plot the f r shifted by the ICT which displays a reduced shift due to photon back-action.We find a decrease in f r by 0.56 MHz between -115 to -90 dBm of power which constitutes an inductance change of 16 ± 3 pH assuming a purely inductive change.
We also find a monotonic decrease in Q int with power, affecting the impedance matching β.We find critical coupling β = 1 at a power of -91.5 dBm.Note that this is significantly above the optimum read-out power found in this work.
Appendix H: Aliasing effect of finite sampling on charge noise When taking the Fourier transform of a sampled data set, duplicates of the Fourier spectrum are created in frequency space that are separated by the sample frequency f s .In a non-ideal situation this will create an overlap between the true frequency spectrum and it's duplicates, an effect known as aliasing.This effect can be effectively avoided if the frequency spectrum of the data has a frequency cut-off, f c , which is less or equal than half the f s , known as the Nyquist condition, i.e. f s ≤ 2f c .Meeting the Nyquist condition can be effected by increasing the sample rate or using a low-pass filter.
In Fig. 4, we find an upwards bend in the charge noise data, in the range f > 10 −1 for the peak tracking and the range f > 10 5 for the voltage spectroscopy.We attribute this to an artefact caused by the aliasing effect described above.In principle this can be avoided by implementing a low-pass filter before the data is sampled, however depending on the frequency drop-off of the filter there may still be a finite contribution to the charge noise.The finite noise contribution can be modelled by a duplication of the charge noise offset by a frequency equal to the sampling frequency f s : In the case of our voltage-spectroscopy measurement we sampled at a frequency of 1 MHz, using a low-pass filter of 100 kHz with 6 dB drop-off per octave (implemented by Stanford Research SR560 pre-amplifiers with variable low-pass filter), fulfilling the Nyquist condition.Because of the presence of this filter there is much less of an aliasing effect in the voltage-spectroscopy spectrum (compared to that of the peak-tracking) but some amount remains above 100 kHz.
For the peak-tracking, on the other hand, there is effectively no analogue filtering in the relevant frequency range.Peak positions are sampled at an f s of 10.4 Hz (given by the speed of the voltage ramp of 83.33 Hz over 8 averages) and the low-pass filter of the SR560 is set at 10 kHz.Reducing the low pass-filter frequency will interfere with the peak shape and therefore make accurate determination of the peak location impossible.This makes it difficult to remove any aliasing contribution for charge noise obtained using the peak-tracking method by analogue methods.Digital averaging and peak fitting introduces some amount of filtering above the averaging frequency and the ramp frequency respectively -however neither of these is able to fulfill the Nyquist condition since they are always limited to above the sampling frequency.

FIG. 1 .
FIG. 1.(a) A hanger mode LCR resonator used for capacitive sensing consisting of the resonator (blue), a load (red) illustrated by an SEM image of a similar device and a coupling capacitor (green) for impedance matching.The response of the load can be understood as an equivalent parallel Sisyphus resistance and parametric capacitance.Reflected magnitude (b) and Phase (c) near the resonance frequency.Pink represents the resonator with the LC filter while grey is the resonator bonded to an alternative surface mount RC filter.(d) CAD design of the LC resonator and filter used in this study.Black tracks represent NbTiN.Indicated are the resonator (blue), the coupling capacitor (green), the LC filter (pink), and where the load and DC biases are wire-bonded to (red and orange).The entire resonator and LC filter reside on the same Sapphire substrate.

40 FIG. 2 .
FIG. 2. (a) Cross section of the silicon nanowire transistor along the direction of the gate (not to scale), showing the TiN+Poly gate with HfSiON/SiO2 dielectric surrounding a B-doped Si channel.The nanowire sits on a buried oxide (BOX) below which the silicon substrate can be used as a back-gate when illuminated.(b) Stability map indicating the location of the ICT (green) and DRT (blue) read-out locations.Frequency shifts vs detuning maps for the ICT (c) and DRT (d), respectively.

FIG. 3 .
FIG. 3. (a) Histogram of signal and background measurements obtained for the DRT at tmeas = 100 ns (f = 2116 MHz, power of -105 dBm).In red, we show the distance and standard deviation of the two measurement outcomes used for the SNR calculations.(b) SNR and Infidelity as a function of tmeas for the DRT (blue) and ICT (green) at the optimum read-out power of -105 dBm and frequency of 2116 MHz for the DRT and 2116.8MHz for the ICT.The SNR is limited in the three regimes by finite bandwidth t0 (pink), white noise (cyan) and 1/f η noise (red).(c) tmin measured against power at frequencies of 2117.2MHz for the ICT and 2115.4MHz for the DRT.(d) tmin against measurement frequency, measured at -120 dBm and -110 dBm for the ICT and DRT, respectively.

17 FIG. 4 .
FIG. 4. Charge noise spectral density against frequency from peak tracking (red) and voltage spectroscopy (blue).Fits are in black and green, respectively.The data in grey shows the equivalent setup noise.Insert lower left: peak location as a function of time used to extract the charge noise.Insert upper right: Line trace of the ICT used to extract the slope of the signal with gate voltage.

FIG. 5 .
FIG. 5. Schematic of spiral inductor and coupling capacitor (a) and section of the interdigitated filter capacitor (b) with dimensions.
Appendix B: Resonator to device connection Appendix C: Inductance correction for a finite filter capacitor

FIG. 6 .FIG. 7 .
FIG. 6. Picture showing resonator components wire-bonded to device.The bottom chip contains the NbTiN resonator and coupling capacitor (top right) and four LC filters on sapphire, three of them connected to the source-drain and gate of the device.The top chip contains the silicon QD device.

1 FIG. 8 .
FIG. 8. Stability map of gate voltage (Vg) against back-gate voltage (V bg ) recorded using reflectometry.The stability map shows two Boron-reservoir-transitions (the two diagonal lines with larger slope) intersected by several DRTs (quasi-vertical lines) creating ICTs at the intersection.The location of the readout transition investigated here is clearly marked.

FrequencyFIG. 9 .
FIG. 9. Fitting procedure for dispersive shift measurements.(a) Example fit to the phase of the reflected signal at large detuning .(b) The frequency shift and κ as a function of detuning for the DRT and ICT respectively.The dashed lines indicate the Bayesian fit extracted from fitting the full phase data.(c) Data and (d) fit of the whole ICT resonance using a charge qubit-resonator interaction model.

FIG. 10 .
FIG.10.Fresnel blobs of DRT with tmeas = 20 µs.Note that the on state is smeared by charge noise while the off state is not.