Resilience of quantum random access memory to generic noise

Quantum random access memory (QRAM)--memory which stores classical data but allows queries to be performed in superposition--is required for the implementation of numerous quantum algorithms. While naive implementations of QRAM are highly susceptible to decoherence and hence not scalable, it has been argued that the bucket brigade QRAM architecture [Giovannetti et al., Phys. Rev. Lett. 100 160501 (2008)] is highly resilient to noise, with the infidelity of a query scaling only logarithmically with the memory size. In prior analyses, however, this favorable scaling followed directly from the use of contrived noise models, thus leaving open the question of whether experimental implementations would actually enjoy the purported scaling advantage. In this work, we study the effects of decoherence on QRAM in full generality. Our main result is a proof that this favorable infidelity scaling holds for arbitrary error channels (including, e.g., depolarizing noise and coherent errors). Our proof identifies the origin of this noise resilience as the limited entanglement among the memory's components, and it also reveals that significant architectural simplifications can be made while preserving the noise resilience. We verify these results numerically using a novel classical algorithm for the efficient simulation of noisy QRAM circuits. Our findings indicate that QRAM can be implemented with existing hardware in realistically noisy devices, and that high-fidelity queries are possible without quantum error correction. Furthermore, we also prove that the benefits of the bucket-brigade architecture persist when quantum error correction is used, in which case the scheme offers improved hardware efficiency and resilience to logical errors.


I. INTRODUCTION
Numerous quantum algorithms have been proposed that claim speedups over their classical counterparts. Such algorithms typically require that classical dataconstituting a classical description of the problem instance-be made available to a quantum processor. Frequently, theoretical constructions called oracles (or black boxes) are invoked to provide this access [1]. For example, oracles can provide quantum access to classical descriptions of Hamiltonians in quantum simulation algorithms [2][3][4][5][6][7], and they are used to encode classical datasets into quantum states in quantum machine learning algorithms [8][9][10][11][12]. In practice, however, providing quantum access to classical data can be nontrivial, and in order to claim a genuine quantum speedup it is crucial that the details of how such oracles are implemented be specified [13].
Quantum random access memory (QRAM) [14][15][16][17][18][19] is a general-purpose architecture for the implementation of quantum oracles. QRAM can be understood as a generalization of classical RAM; the classical addressing scheme in the latter is replaced by a quantum addressing scheme in the former. More precisely, in the case of classical RAM, an address i is provided as input, and the RAM returns the memory element x i stored at that address. Analogously, in the case of QRAM, a quantum superposition of different addresses |ψ in is provided as input, and the QRAM returns an entangled state |ψ out where each address is correlated with the corresponding memory element, where N is the size of the memory [20], and the superscripts A and B respectively denote the input and output qubit registers. (In this work, we restrict our attention to the case where the memory elements are classical, though in principle QRAM can also be used to query quantum data.) Remarkably, QRAM can perform operation (1) in only O(log N ) time, albeit at the cost of O(N ) ancillary qubits. The short query time, together with the generality of operation (1), makes QRAM appealing for use in many quantum algorithms, especially those that require O(log N ) query times in order to claim exponential speedups. Further, QRAM can serve as an oracle implementation in quantum algorithms for machine learning [8][9][10][11][12][21][22][23], chemistry [7,24], and a host of other areas [25][26][27][28][29][30][31][32][33]. The idea of QRAM has faced skepticism, however, and the question of whether QRAM can be used to facilitate quantum speedups, either in principle or in practice, has not been definitively settled (see, e.g., Refs. [13,34], or the excellent summary in Ref. [12]). A central practical concern is the seemingly high susceptibility of QRAM to decoherence [14,17]. As we discuss below, naive implementations of QRAM perform operation (1) with an infidelity that scales linearly with the size of the memory. Such implementations are not scalable. As the memory size increases, the infidelity grows rapidly without quantum error correction, yet the overhead associated with error correction can quickly become prohibitive because all O(N ) ancillary qubits need to be corrected [18].
Refs. [14,15] proposed the so-called "bucket-brigade" QRAM architecture as a potential solution to this decoherence problem, though this solution has also faced skepticism. Proponents argue that the bucket-brigade QRAM is highly resilient to noise, in that it can perform operation (1) with an infidelity that scales only polylogarithmically with the size of the memory. This favorable scaling could allow for high-fidelity queries of large memories without the need for quantum error correction, thereby mitigating the aforementioned scalability problem. This noise resilience, however, has only been derived for contrived noise models that place severe constraints on the quantum hardware [14,15,17], thus casting doubt on the viability of the bucket-brigade architecture. Indeed, while several proposals for experimental implementations of QRAM have been put forth [15,16,[35][36][37], to our knowledge there has yet to be an experimental demonstration of even a small-scale QRAM [38]. Absent from this debate has been a fully general and rigorous analysis of how decoherence affects the bucket-brigade architecture.
In this work, we study the effects of generic noise on the bucket-brigade QRAM architecture. Our main result is that the architecture is far more resilient to noise than was previously thought (our main scaling results are summarized in Table I). We rigorously prove that the infidelity scales only polylogarithmically with the memory size even when all components are subject to arbitrary noise channels, and we verify this scaling numerically. Remarkably (and perhaps counter-intuitively), this scaling holds even for noise channels where the expected number of errors scales linearly with the memory size. Our analysis reveals that this remarkable noise resilience is a consequence of the limited entanglement among the memory's components. We leverage this result to show that significant architectural simplifications can be made to the bucket-brigade QRAM, and that so-called "hybrid" architectures [18,19,33,39], which implement (1) with fewer qubits but longer query times, can also be made partially noise resilient. We also show that these benefits persist when quantum error correction is used. Importantly, the present work shows that a noise-resilient QRAM can be constructed from realistically noisy devices, paving the way for small-scale, near-term experimental demonstrations of QRAM.
This paper is organized as follows. In Section II, we give a detailed review of QRAM architectures, and an intuitive explanation for the noise-resilience of the bucketbrigade scheme is provided. Our main result is presented in Section III: we prove that the query infidelity of the bucket-brigade architecture scales only polylogarithmically when its components are subject to generic mixedunitary error channels (the full proof for arbitrary error channels is given in Appendix D). Importantly, these proofs assume that all components of the QRAM (both active and inactive) are susceptible to decoherence, in contrast to prior works. The remaining sections provide corollaries, generalizations, and numerical demonstrations of this main result. In Section IV, we propose and implement an efficient classical algorithm for the simulation of noisy QRAM circuits, and we use this algorithm to confirm that the bucket-brigade QRAM is resilient to realistic errors. Next, in Section V, we show that the use of three-level memory elements in the original bucketbrigade architecture is superfluous and that the architecture can be significantly simplified (while maintaining noise resilience) by instead using two-level memory elements. In Section VI, we show that the bucket-brigade architecture can also be employed to imbue hybrid architectures with partial noise resilience. In Section VII, we prove that error-corrected implementations of the bucketbrigade architecture are resilient to logical errors, and we discuss the practical utility of error-corrected QRAM. Finally, in Section VIII we conclude by discussing potential applications.

II. QUANTUM RANDOM ACCESS MEMORY
In both classical and quantum random accesses memories, each location in memory is indexed by a unique binary address. To read from the memory, an address is provided as input, and the memory element located at that address is returned at the output. In the classical case, transistors are the physical building blocks of the addressing scheme: they act as classical routers, directing electrical signals to the memory location specified by the address bits. Analogously, in the quantum case, quantum routers are the fundamental building blocks of the addressing scheme. As shown in Fig. 1(a), a quantum router is a device that directs incident signals along different paths in coherent superposition, conditioned on the state of a routing qubit. For example, if the routing qubit is in state |0 (|1 ), then a qubit incident on the router is routed to the left (right). If the routing qubit is in a superposition, then the incident qubit is routed in both directions in superposition, becoming entangled with the routing qubit in the process. Quantum routers can also be understood through the language of quantum circuits [ Fig. 1(b)]; the routing operation is a unitary that can be implemented via a sequence of controlled-SWAP gates (Fredkin gates).
In this section, we review two QRAM architectures based on quantum routers: the fanout architecture [40] and the bucket-brigade architecture [14,15]. The fanout architecture is highly susceptible to noise, and we discuss it in order to illustrate how the lack of noiseresilience fundamentally limits QRAM scalability. The noise-resilience of the bucket-brigade architecture is the main focus of this work.

A. Fanout QRAM architecture
A QRAM can be constructed out of quantum routers as shown in Fig 1(c) (see Ref. [40], Chapter 6). A collection of routers is arranged in a binary tree, with the outputs of routers at one level of the tree acting as inputs to the routers at the next level down. The memory is located at the bottom of the tree, with each of the N memory cells connected to a router at the bottom level. To query the memory, all routing qubits are initialized in |0 , and a register of log N address qubits is prepared in the desired state (in this work, all logarithms are base 2). All routing qubits at level of the tree are then flipped from |0 to |1 conditioned on the -th address qubit. To retrieve the memory contents, a so-called bus qubit is prepared in the state |0 and injected into the tree at the top node. The bus follows the path indicated by the routers down to the memory. Upon reaching a memory cell, the contents of that memory cell are copied into the state of the bus (see Appendix B for details). Note that because we consider classical data, the data can be copied without violating the no-cloning theorem. For simplicity, we assume that each memory element x i is a single bit, in which case a single bus qubit suffices to store the memory element (higher-dimensional data can be retrieved using multiple bus qubits). Finally, the bus is routed back out of the tree via the same path, and all routers are flipped back to |0 in order to disentangle them from the rest of the system. Importantly, because the routers operate coherently, the above procedure allows one to query multiple memory elements in superposition, as in (1). If the address qubits are prepared in a superposition of different computational basis states, the bus is routed to a superposition of different memory locations.
In this architecture, the total time required to perform a query (or, equivalently, the circuit depth) is only O(log N ). The ability to perform queries in logarithmic time can be crucial for algorithms that invoke QRAM in order to claim exponential speedups over their classical counterparts. However, this speed comes at the price of a high hardware cost. To perform operation (1), both the fanout and bucket-bridgade architectures require O(N ) ancillary qubits to serve as routers. We discuss practical concerns associated with the high hardware cost more thoroughly in Sections VII and VIII. For context, we note that there is a space-time trade-off in implementing operation (1). At the other extreme, there are circuits which implement (1) in O(N ) time using only O(log N ) qubits [5,41,42], and several implementations that leverage this trade-off have also been proposed [18,19,33,39]. We discuss the effect of decoherence on these implementations in detail in Section VI.
The fanout architecture is impractical due to its high susceptibility to decoherence. Each address qubit is maximally entangled with all routers at the respective level of the tree (similar to a GHZ state), so the decoherence of any individual router is liable to ruin the query. As an example, suppose that the routers are subject to amplitude damping errors. The loss of an excitation from any router at level collapses all other level-routers and the -th address qubit to the |1 state. Any terms in the superposition where the -th address qubit was in the |0 state prior to the error are thus projected out, thereby reducing the fidelity by a factor of 2 on average.
More generally, suppose that each router suffers an error with probability ε at each time step during the query. The final state Ω of the full system (address, bus, and routers) can then be written as a statistical mixture where Ω ideal is the error-free state, T = O(log N ) is the number of time steps required to perform a query, and ". . ." denotes all states in the mixture where at least one of the N − 1 routers has suffered an error. We define the query fidelity as where Tr R indicates the partial trace over the routers. The routers are traced out because only the address and bus registers are passed on to whatever algorithm has queried the QRAM; the routers are ancillae whose only purpose is to facilitate the implementation of operation (1). As illustrated by the amplitude-damping example, the problem with the fanout implementation is that the noerror state Ω ideal is generally the only state in the mixture (2) with high fidelity. Neglecting the low-fidelity states, the query infidelity scales as to leading order in ε. We refer to this linear scaling of the infidelity with the memory size as unfavorable because error probabilities ε 1/N T are required to perform queries with near-unit fidelity. This stringent requirement severely constrains the size of fanout QRAMs. For example, error probabilities ε ∼ 10 −3 would restrict the maximum size of a high-fidelity fanout QRAM to less than N ∼ 100 memory cells. While quantum error correction can be used to suppress the error rates in principle, the additional hardware overhead can be prohibitive [18] because all O(N ) routers must be error corrected (see Section VII for a more detailed discussion of error correction and the associated overhead). Thus, because of its high susceptibility to decoherence, the fanout architecture is not regarded as scalable.

B. Bucket-brigade QRAM architecture
In Ref. [14], two modifications to the fanout architecture were proposed, and it was argued that the modified architecture, termed the "bucket-brigade" [ Fig. 1(d)], is highly resilient to noise. The first modification is that the two-level routing qubits are replaced with three-level routing qutrits. In addition to the |0 (route left) and |1 (route right) states, each router also has a third state, |W (wait). We refer to the states |0 , |1 as active, and the state |W as inactive. We assume that all routers are initialized in the |W state, and that the action of the routing operation [ Fig. 1(b)] is trivial when the routing qutrit is in the |W state. (In Section V, we show that these assumptions may be relaxed, but we make them here for concreteness.) Each router's incident and output modes are also now taken to be physical three-level systems, and each address qubit is encoded within a two-level subspace of a physical three-level system.
We have borrowed the terminology of active and inactive routers from earlier works on QRAM [14,17]. While these prior works assumed inactive routers to be free from decoherence, we stress that we make no such assumption here. As is discussed further in Section II C, we assume that routers are prone to decoherence regardless of whether they are active or inactive. In this work, we define the terms "active" and "inactive" only as labels for the different subspaces of a router's Hilbert space: active ≡ span(|0 , |1 ) and inactive ≡ span(|W ). We do not assume that either of these subspaces has any special properties (e.g., different decoherence rates).
The second modification is that the address qubits are themselves routed into the tree during a query. When an address qubit encounters a router in the |0 (|1 ) state, it is routed to the left (right) as usual. When an address qubit encounters a router in the |W state, the states of the router and incident mode are swapped, so that the router's state becomes |0 (|1 ) when the incident address was |0 (|1 ). The physical implementation described in Ref. [14] provides a helpful example to visualize how these operations could be realized: the authors envisage the routers as three-level atomic systems, with the address qubits encoded in the polarization states of flying photons. (Note that the two polarization states constitute a two-level subspace of a physical three-level system, since the photonic mode may also be in the vacuum state.) When a photon encounters an atom in the |W state, it is absorbed, and in the process it excites the atom to the |0 or |1 state conditioned on its polarization. When subsequent photons encounter the excited atom, they are routed accordingly. These operations can also be described using the conventional quantum circuit model, and in Appendix A we provide a full circuit diagram.
To query the memory, the address qubits are sequentially injected into the tree at the root node. The first address qubit is absorbed by the router at the root node, exciting it from |W to the {|0 , |1 } subspace in the process. The second address qubit is routed left or right, conditioned on the state of the router at the root node. The state of the first address qubit thereby dictates the routing of the second. The second address is subsequently absorbed by one of the routers at the second level of the tree. The process is repeated, with the earlier addresses controlling the routing of later ones, carving out a path of active routers from the root node to the specified memory element. Once all address qubits have been routed into the tree, the bus qubit is routed down to the memory and the data is copied as before (see Appendix B). Finally, the bus and all address qubits are routed back out of the tree in reverse order to disentangle the routers. Here again, we emphasize that multiple memory elements can be queried in superposition, as in (1), because all routing operations are performed coherently.

C. Noise resilience: overview and conceptual explanation
The bucket-brigade architecture is clearly resilient to certain types of noise. For example, Ref. [17] studied the bucket-brigade QRAM with routers subject to |0 ↔ |1 bit-flip errors, with the |W states assumed to be error free. In this case, the expected number of errors is only ε log N , because only the log N active routers are prone to errors [43]. The expected number of errors also scales with log N for the error model considered in Refs. [14][15][16], where gates involving inactive routers are assumed to be error free.
For these error models, the query infidelity is to leading order in ε, where α is some constant, and we recall that T = O(log N ) is the number of time steps. We refer to this logarithmic scaling of the infidelity with the memory size as favorable because queries can be performed with near-unit fidelity so long as the error rate satisfies ε 1/T log α N . This is a much more forgiving requirement; memories of exponentially larger size can be queried relative to the fanout architecture. Indeed, the exponential improvement in scalability suggests that quantum error correction is not required to query large memories with high fidelity, provided physical error rates are sufficiently low.
Unfortunately, the above error models can be poor approximations of the noise in actual quantum hardware.
In these contrived models, inactive routers are assumed to be completely free from decoherence. More realistically, all routers will be prone to decoherence, independent of whether they are active or inactive. For example, though several proposals for experimental implementations of the bucket-brigade scheme have been put forth [15,16,[35][36][37], none have proposed a method of engineering routers that are free from decoherence when inactive. While one can conceive of implementations in which inactive routers have decoherence rates which are nonzero but far smaller than those of active routers, it is not obvious whether such implementations would enjoy the favorable infidelity scaling. Indeed, Ref. [14] conjectured that decoherence of inactive routers could significantly increase the infidelity in this case, owing to the exponentially larger number of inactive routers. Furthermore, Refs. [14,17] portray the favorable infidelity scaling as a direct consequence of the assumption that inactive routers are decoherence-free.
It is thus natural to ask whether the favorable scaling still holds when inactive routers are not assumed to be decoherence-free. Relaxing this assumption causes the expected number of errors to increase exponentially, from O(log N ) to O(N ). Because the expected number of errors in the fanout architecture is also O(N ), one might naively expect that the favorable infidelity scaling no longer holds. However, in the next section we prove that this is not the case. Perhaps surprisingly, the infidelity of the bucket-brigade architecture still scales favorably despite the exponential increase in the expected number of errors. Moreover, the favorable scaling holds for arbitrary error channels.
The noise-resilience of the bucket-brigade architecture can be understood intuitively as a consequence of the minimal entanglement among the routers, see Fig. 2. Suppose one queries all memory locations in equal superposition. Then in both the fanout and bucket-brigade architectures, all of the routers are entangled. However, the degree to which each router is entangled with the rest of the system is quite different between the two architectures. This difference can be quantified by computing the entanglement entropy for a given router where ρ is the reduced density matrix of the router, obtained by tracing out the rest of the system. In the fanout architecture, each router is maximally entangled with the rest of the system; the reduced density matrix is the maximally mixed state ρ = I/2 (recall the fanout architecture employs two-level routers), for which S(ρ) = 1. In contrast, in the bucket-brigade architecture, the entanglement entropy of a router depends on its location within the tree. A router at level (0-indexed) of the tree is only active in N 2 − of the N different branches of the superposition. As a result, the entanglement entropy decreases exponentially with depth, S(ρ) ∼ 2 − . Routers deeper down in the tree are nearly disentangled from the system, and their decoherence only reduces the query + + + + + ...

FIG. 2.
Conceptual picture of noise resilience. Each ket represents the state of the QRAM when a different memory element is queried, with the superposition of kets representing a superposition of queries to different elements. When a router r suffers an error (red lightning bolt), it corrupts only the subset of queries where r is active (indicated by thick red kets); other queries in the superposition succeed regardless. Because most routers are only active in a small fraction of queries, most queries succeed and the total infidelity is low.
fidelity by an exponentially decreasing amount. Thus, despite the fact that exponentially many such errors typically occur, the overall fidelity can remain high. More precisely, if we posit that the infidelity associated with an error in a router at level scales as ∼ 2 − due to the limited entanglement, and that εT 2 such routers suffer errors on average, then the total infidelity scales as The infidelity scales only logarithmically with N because the exponential increase in the expected number of errors with is precisely cancelled by the exponential decrease in the infidelity associated with each. We rigorously justify these claims in the next section.

III. PROOF OF NOISE RESILIENCE
In this section, we prove that the query infidelity of the bucket brigade architecture is upperbounded by where T = O(log N ) is the time required to perform a query, ε is the probability of error per time step, and A is a constant of order 1. This bound holds even when all N memory elements are queried in superposition, and it holds for arbitrary error channels, including, e.g., depolarizing errors and coherent errors. Moreover, throughout this paper we assume no special structure in the classical data x i , so our bounds hold independent of the data. Our proof is based on a careful analysis of how errors can propagate throughout the QRAM. Accordingly, we begin by defining our error model. We suppose that each routing qutrit is subject to an error channel in the form of a generic completely-positive trace-preserving map, where the Kraus operators K m obey the completeness relation m K † m K m = I. The error channel is applied simultaneously to all routers at discrete time steps throughout the query (see Eq. (15) below). In Appendix D, we prove that the bound (8) holds for arbitrary error channels of the form (9). For the sake of brevity and simplicity, however, here we restrict our attention to channels where (i) there is a no-error Kraus operator, K 0 , that is proportional to the identity, and (ii) the remaining Kraus operators are proportional to unitaries, K † m K m ∝ I. Under these restrictions, for some ε ∈ [0, 1]. An operational interpretation of this channel is that one of the errors K m>0 occurs with probability ε, and no error occurs with probability 1 − ε. Experimentally relevant examples include bit-flip, dephasing, and depolarizing channels. The restriction to this form of mixed-unitary channel allows us to make two assumptions that greatly simplify the proof: (i) the probability that an error occurs is independent of the router state, and (ii) the no-error backaction K 0 ∝ I is trivial. We make no further assumptions about the Kraus operators, and we stress that they may act non-trivially on the inactive state |W , meaning that inactive routers can decohere.
It is important to note that this error model only describes decoherence of the routing qutrits; a router's incident and output modes may also decohere, and there may be errors in the gates that implement the routing operation. At the end of this section, we prove that the bound (8) still holds when including these other errors, but we neglect them for now to simplify the discussion.
The proof proceeds by direct calculation. To bound the infidelity, we first write the final state Ω as a sum over different error configurations, where an error configuration c specifies which Kraus operator is applied to each router at each time step. Here, p(c) is the probability of configuration c, and the pure state Ω(c) = |Ω(c) Ω(c)| is the corresponding final state of the system (both quantities are defined more formally below). The fidelity is thus given by, . The single-router Kraus operators K c(r,t) comprising the tensor product K c(t) are arranged geometrically according to the routers on which they act. Branches of the tree are classified as either good or bad according to the locations of the errors Km>0. (b) Query to an element k ∈ g(c). Routers are labelled with their ideal, error-free states, and routers outlined in red suffer errors. Because one of the active routers suffers an error, the query is liable to fail. where is the query fidelity of the state Ω(c). Our approach is to place an upper bound on the infidelity by deriving an upper bound on 1 − F (c). Let us formally define Ω(c) and p(c). A QRAM query consists of O(N ) routing operations [ Fig. 1(b)] performed in a predetermined sequence. By design, many of these operations commute and can be performed in parallel, so that the entire operation can be written as a quantum circuit with depth T = O(log N ) (see Appendix A for circuit diagram). More precisely, operation (1) can be written as, where |W = |W ⊗(N −1) is the initial state of the routers, and U t is a constant-depth circuit. Now, let K c(r,t) denote the Kraus operator applied to router r at time step t, and define the composite Kraus opera- The requirement that |Ω(c) is normalized defines the probability p(c) of obtaining state Ω(c) in the mixture (11). Note that c p(c) = 1 follows from the Kraus operators' completeness relation. For a given error configuration c, it is convenient to classify branches of the tree as either good or bad, depending on whether errors K m>0 are ever applied to the routers in the branch [ Fig. 3(a)]. More precisely, let i denote the set of all routers in the i-th branch of the tree (corresponding to address i), and let c denote the set of all routers which have an error K m>0 applied to them at some time step. A branch i is defined to be good if i ∩ c = ∅, and bad otherwise. To keep the notation simple, we use g(c) to denote set of good branches. As illustrated in Fig. 3(b), queries to addresses i ∈ g(c) are liable to fail because they rely on routers that suffer errors. Error propagation. (a,b) Constrained propagation during queries to elements ∈ g(c). The error in the leftmost router can propagate upward into the left output of the router indicated by the dashed box. The circuits on the left show that the error does not propagate further, regardless of whether the router is inactive (a) or active (b). In the circuit diagrams, red boxes denote errors Km>0, and the red arrows indicate how the error propagates (i.e. how the error transforms under conjugation by the routing operation). (c) Error propagation is not constrained during queries to elements ∈ g(c). Note that the state of the router dictates how the error propagates in these examples.

Incident
The main observation underlying our proof is that the propagation of errors is constrained when memory elements ∈ g(c) are queried. Roughly speaking, errors do not propagate from bad branches into good branches. More precisely, for any i, j ∈ g(c), errors do not propagate into branch j during a query to element i. We illustrate this fact with two examples, shown in Figs. 4(a,b). In general, errors in the bad branches can propagate. They can even propagate into an output mode of a router r in branch j ∈ g(c), but they can never propagate into branch j. Fig. 4(a) shows an example of how such an error propagates through r's routing operation in the case where a memory element i = j is queried. Because j ∈ g(c), r's routing qutrit suffers no errors and is thus in |W . The action of the routing operation is trivial for a router in |W , so the error does not propa-gate to other modes. (We reiterate that we are assuming error-free gates; gate errors are discussed at the end of this section.) Similarly, Fig. 4(b) shows an example of how errors propagate in the case where j is queried. The error-free routing qutrit is in |1 , so the routing operation acts non-trivially on only the incident and right output modes. The error in the left output mode does not propagate upward. For comparison, in Fig. 4(c) we illustrate that the propagation of errors is not constrained in this way when memory elements k ∈ g(c) are queried. As an aside, we note that the constrained error propagation can be understood as a sort of error transparency [44][45][46]: when elements ∈ g(c) are queried, the errors in the bad branches commute with the routing operations in the good branches.
The constrained propagation of errors has two important consequences. The first is that a query to memory element i ∈ g(c) always succeeds, meaning that the address and bus registers are in the desired state |i A |x i B at the end of the query. This follows from the fact that errors cannot propagate to any of the routers in branch i. The second consequence is that, if multiple memory elements i, j, . . . ∈ g(c) are queried in superposition, the address and bus registers are disentangled from the routers at the end of the query. This follows from the fact that errors are restricted to propagate within the bad branches, and their propagation is unaffected by routers outside these branches. Figs. 4(a,b) provide an example. As a result, even though errors can propagate non-trivially among the bad branches during the query, the final state of the routers is independent of which memory element in g(c) is queried.
It follows that the final state |Ω(c) can be written as with Here, |f (c) R denotes the final state of the routers with respect to the good branches, and |bad(c) contains the i ∈ g(c) terms. We now use the expression (16) to place a lower bound on F (c). First notice that which can be obtained by performing the partial trace in Eq. (13) using a basis that contains the state |f (c) and neglecting the contributions from other states. Then, defining Λ(c) as the weighted fraction of good branches, we have that To obtain the inequality (21) we have used the fact that |Ω(c) is normalized and that good(c)|bad(c) = 0. The latter follows from the orthogonality of different initial address states, i|j A = 0 for i = j, and the fact that all subsequent operations, including the Kraus operators, are unitary and thus preserve inner products (this follows from our earlier restriction to mixed-unitary error channels; general channels are covered by the proof in Appendix D). Plugging Eqs. (16), (20) and (21) into the bound (18) and applying the reverse triangle inequality allows us to bound the infidelity as a function of Λ(c), To proceed further, we compute the expected fraction of good branches, E(Λ), where the expectation value is taken with respect to the distribution of error configurations, i.e. E(f ) = c p(c)f (c). This expectation value can be computed recursively for trees of increasing depth. Let E d (Λ) denote the expected fraction of good branches for a depth-d tree. For a depth-1 tree, expected fraction is equivalent to the probability that the lone router never suffers an error, E 1 (Λ) = (1−ε) T . For deeper trees, the expected fraction of error-free routers at each level is Applying this rule to the initial condition E 1 (Λ), we obtain We can now combine the above results to bound the infidelity. We have that where the second inequality follows from (22) under the assumption that E(Λ log N ) ≥ 1/2. Applying Bernoulli's inequality yields the desired result, be interpreted as a consequence of the limited entanglement among the routers, as discussed in Section II. This limited entanglement manifests in Eqs. (16) and (17). The fact that a router at level is active in only N 2 − of the N branches implies both that the router's entanglement entropy decreases exponentially with , and that only N 2 − branches are corrupted when it suffers an error. We conclude this section by describing four simple extensions of the proof that cover other cases of interest: 1. Initialization errors. Suppose that each router has some probability ε of not being initialized to |W prior to the query. Such errors can be viewed as router errors of the form (9) that occur during the 0-th time step. As such, they are also covered by the proof provided one replaces T → T + 1 in the equations above. In Section V, we show that, in fact, one can make an even stronger statement: the infidelity scales favorably even when the QRAM is initialized in an arbitrary state.
2. Gate errors. Faulty implementation of the routing operation can be described without loss of generality as a composition D •R, of some error channel D followed by the ideal routing operation R. Provided that D's Kraus operators are proportional to unitaries, and that there is a no-error Kraus operator proportional to the identity, then D can also be written in the form (10), and the proof proceeds as above. Note that the propagation of errors is still constrained in the case of gate errors because all routing gates in good branches are error-free by construction.
3. Alternate gate sets. We have defined the routing operation as a sequence of two controlled-SWAP gates [ Fig. 1(b)], but this same operation could also be decomposed into other types of gates, e.g. into Toffolis, or Clifford + T gates. The bound (28) holds for any choice of gate decomposition. To see that the bound holds, consider that any error that propagates non-trivially through a given routing operation can be categorized as occurring either before or during that operation. The propagation of errors that occur before the operation is determined solely by the conjugation of the error with the entire routing operation (Fig. 4), which is unaffected by the choice of decomposition. In contrast, the propagation of errors that occur during the operation will generally depend on the choice of the decomposition. However, such errors can equivalently be described as a faulty implementation of the routing operation itself, so they do not spoil the favorable error scaling by the argument in the previous paragraph.
4. Correlated errors. The noise resilience also persists in the presence of correlated errors that afflict a constant number of adjacent routers in the tree. The proof assumes that if any error (correlated or otherwise) occurs in a branch, then that branch does not contribute to the fidelity. As such, whether an error afflicts only a given router r or also some of r's child routers lower in the tree is irrelevant to the proof. The effects of correlated errors can thus be incorporated simply by augmenting ε to also include the probability that a router is among those afflicted by a correlated error. For correlated errors afflicting only a constant number of adjacent routers, the resulting increase in ε is independent of N , so the query infidelity still scales only polylogarithmically with N .

IV. CLASSICAL SIMULATION OF NOISY QRAM CIRCUITS
In this section, we verify the bound (28) through numerical simulation of noisy QRAM circuits. While full state vector simulations require exp(N ) memory and quickly become intractable as the QRAM size grows, our simulations are enabled by a novel classical algorithm with space and time complexity poly(N ).
The main observation underlying the algorithm is that any quantum circuit consisting of the following elements can be simulated efficiently classically: state preparation in the computational basis, and gates from the set {SWAP, controlled-SWAP}. Such circuits are essentially classical-the system begins in a definite computational basis state, and the SWAP-type gates act only as permutations so that the system remains in a computational basis state through every step of the circuit. The simulation proceeds simply by tracking the (classical) state of the system. Furthermore, for initial states that are a superposition of polynomially-many different computational basis states, it follows from linearity that the action of any circuit composed of these SWAP-type gates can also be efficiently simulated. QRAM circuits can thus be efficiently simulated because they consist of SWAP-type gates acting on O(N ) qubits or qutrits, and the system is initialized in a superposition of only O(N ) computational basis states (one for each address). In fact, QRAM circuits are examples of so-called efficiently computable sparse (ECS) operations, whose efficient classical simulation is described in Ref. [47].
For context, we note that this approach is similar in spirit to the Gottesman-Knill theorem [48], which states that any Clifford circuit with preparation and measurement in the computational basis can be simulated classically in polynomial time. Because QRAM circuits necessarily employ non-Clifford gates (controlled-SWAP), however, the theorem does not directly apply. Still, the similarities are apparent: restricting the allowed gates and state preparations enables an efficient classical description of the system, making efficient simulation possible.
In addition, for a wide variety of error models, noisy QRAM circuits can be simulated efficiently using Monte Carlo methods. To simulate noisy circuits, the space of error configurations is randomly sampled according to the distribution p(c). For each sampled configuration c from a set of samples S, we compute the final system state |Ω(c) , and we obtain the fidelity by averaging F = 1 |S| c∈S F (c). This sampling procedure is efficient provided that two criteria are satisfied: first, that the state |Ω(c) is efficiently computable, and second, that sampling from p(c) is efficient. A sufficient condition for satisfying these two criteria is that the error channel maps computational basis states to other computational states, i.e., the channel's Kraus operators K m satisfy for all m, and where |i , |i ∈ {|0 , |1 , |W } are computational basis states. The first criterion is satisfied because Eq. (29) guarantees that a QRAM circuit interspersed with applications of the Kraus operators K m is still ECS. The second criterion is satisfied because the distribution p(c) can be sampled efficiently by applying errors independently to each router (with appropriate probability) at each time step as the simulation proceeds.
In detail, suppose that at time t the system is in a state |ψ(t) that is a superposition of polynomially-many computational basis states, where |i r denotes the state of router r, and the cardinality of the set C is O(polyN ). The probability that a Kraus operator K m is applied to router r is where ρ r (t) = Trr(|ψ(t) ψ(t)|) is the reduced density matrix of router r, with Trr denoting the partial trace over the rest of the system. Eq. (29) guarantees that this probability is efficiently computable, so sampling from the possible errors at time t is also efficient. This sampling procedure is repeated at each time step in order to sample from the full error configuration. We apply this algorithm in order to compute the query infidelity for QRAM circuits with routers subject to a variety of noise channels. The results (Fig. 5) confirm that the QRAM query infidelity scales favorably in the presence of realistic noise channels acting on all of the memory's components. We stress that, for such channels, the expected number of errors generally scales linearly with N . Results for qutrit depolarizing, bit-flip, and dephasing channels are shown in panels (a), (b), and (c), respectively (see Appendix C for Kraus decompositions for each channel). These channels are all of the form (10), so the query fidelity is subject to the bound (28). The numerical results are all clearly consistent with this bound, and the expected 1 − F ∝ log 2 N scaling is evident on the log-log scale. In panels (d) and (e), we show numerical results for qutrit decay and heating channels (Appendix C). We find that the query fidelities for these channels also satisfy the bound (28). Note, however, that the decay and heating channels are not mixed-unitary channels, so the query fidelities are subject to the general bound derived in Appendix D, rather than Eq. (28).

V. NOISE RESILIENCE WITH TWO-LEVEL ROUTERS
In Section III, we proved that the query infidelity of the bucket-brigade QRAM scales favorably, even when inactive routers are subject to decoherence. It is thus natural to ask whether distinguishing between active and inactive routers is useful, and in fact whether the use of threelevel routers is necessary in the first place. In this section, we show that the answer is no-the query infidelity still scales only polylogarithmically for QRAMs constructed from noisy two-level routers. As in Section III, the argument presented to justify this claim is based on a careful analysis of how errors propagate. Furthermore, we show that this same argument also reveals that noise resilience persists when the QRAM is initialized in an arbitrary state, and when the routing circuit [ Fig. 1(b)] is modified. Taken together, the results in this section show that the noise resilience of the bucket-brigade scheme is a robust property that is insensitive to implementation details. They also show that existing experimental proposals [16,35] employing two-level routers are noiseresilient.
Consider a QRAM constructed from routers with only two states: |0 (route left) and |1 (route right). Routers are thus always active. For concreteness, we suppose that the routing operation is implemented using the circuit in Fig. 1(b), and that all routers are initialized in |0 , though these assumptions can be relaxed. Unfortunately, the proof from Section III cannot be directly applied to show that the query fidelity also scales favorably in this case. The proof fails in the case of two-level routers because the propagation of errors is no longer so highly constrained. Recall that in the case of three-level routers, errors do not propagate from bad branches into good branches. More precisely, for any i, j ∈ g(c), errors do not propagate into branch j when branch i is queried. This is not the case for two-level routers: while errors do not propagate into branch i when branch i is queried, they can propagate into other branches j, as illustrated in Fig. 6. Because of this difference, when multiple memory elements i, j, . . . ∈ g(c) are queried in superposition, it is not guaranteed that the address and bus registers will be disentangled from the routers at the end of the query. Thus, Eqs. (16) and (17) no longer hold. Instead, the final state |Ω(c) is given by where |f i (c) denotes the now address-dependent final state of the routers, and |f i (c) = |f j (c) in general. As a result, the i, j ∈ g(c) terms are no longer guaranteed to be in coherent superposition after tracing out the routers. Rather, the final state of the address-bus system is liable to contain an incoherent mixture of these terms. That is, the final density matrix can contain terms of the form |i, x i i, x i | and |j, x j j, x j | without |i, x i j, x j | or |j, x j i, x i | terms. This loss of coherence reduces the fidelity.
We now proceed to estimate this reduction in fidelity. We find that the reduction is mild, such that the infidelity still scales only polylogarithmically with the memory size. Our approach is to isolate the subset of branches in g(c) for which the sort of damaging error propagation described above does not occur. Explicitly, we define the subsetg(c) ⊆ g(c) as the largest subset such that for any i, j ∈g(c) errors do not propagate into branch j during a query to element i. We then have that |f i (c) = |f j (c) by the same argument as given in Section III. It follows that, if multiple memory elements ing(c) are queried in superposition, the address and bus registers will be disentangled from the routers at the end of the query.
Having definedg(c) as the subset of good branches without damaging error propagation, we are free to define all other branches as bad and then proceed exactly as in Section III. In particular, we analogously definẽ as the weighted fraction of good branches, and follows as the analog of Eq. (26). Becauseg(c) ⊆ g(c), we have that for some δ ∈ [0, 1] to be determined. Proceeding as in Section III, it follows that the infidelity satisfies the bound assuming εT log N + δ ≤ 1/4. We can estimate δ by computing the average probability that errors propagate from bad branches into good branches. More specifically, we compute the probability that an error propagates into a branch i ∈ g(c) when some other branch j ∈ g(c) is queried. Suppose that a router r suffers an error at time step t, and let P r→i (t) denote the probability of this error propagating into branch i. Then to leading order in ε, which can be understood as the total probability that an error occurs and propagates into branch i. To compute r,t P r→i (t) to leading order, we observe that errors are generally free to propagate from a router's left output to its input, as illustrated in Fig. 6(b). This is because, by default, all routers are initialized in |0 , for which the routing operation swaps the states at the incident and left ports. In contrast, for an error to propagate upward from a router's right output, an additional error would be required to flip the router from |0 to |1 . Thus, only the errors which can reach branch i by propagating upward exclusively through the left outputs of routers contribute to r,t P r→i (t) to leading order in ε. A conservative overestimate is thus obtained by first enumerating all routers r that are connected to i through the left ports of other routers, then pessimistically taking P r→i (t) = 1 for each. There are at most log 2 N such routers, so Substituting this expression into Eq. (36), we obtain Here we use the symbol to contrast this bound with Eq. (28); we proved the bound (28) rigorously, while we have obtained Eq. (39) through a scaling argument. As such, it is appropriate to focus only on the scaling of Eq. (39). We see that the infidelity still scales only polylogarithmically with the memory size, indicating that a bucket-brigade QRAM constructed from noisy twolevel routers also exhibits noise resilience. Note, however, that the infidelity here scales with log 3 N [recall T = O(log N )], as opposed to log 2 N in the case of threelevel routers. Both scalings are still favorable according to our definition, but the discrepancy indicates that three-level routers impart better noise resilience than two-level routers.
We simulate noisy QRAM circuits with two-level routers in order to verify this noise resilience. Simulation results are shown in Fig. 7. For all noise channels simulated, the query infidelity is observed to scale polylogarithmically with the memory size, as expected. Moreover, the observed scaling exponents are ≤ 3 in all cases, consistent with the pessimistic 1 − F ∼ log 3 N scaling given above.
It is interesting to note that two-level routers are more resilient to certain noise channels than others, as quantified by the observed differences in scaling exponents. For example, the infidelity under the dephasing channel is observed to scale approximately as 1 − F ∼ log 2 N . This relatively mild scaling can be explained as follows. When the dephasing errors are propagated through the QRAM circuit, they may act non-trivially on the final state of the address and bus registers, but they act trivially on the final state of the routers (the all-|0 state). As a result, the final state of the routers is the same for every address: |f i (c) = |f j (c) for all i, j. Hence,g(c) = g(c), and the bound from Section III applies. For the other channels, g(c) = g(c) in general, consistent with observed scaling exponents > 2. The case of amplitude damping is also interesting to consider: the expected number of errors for this channel is only εT log N because only log N excitations are injected into the tree. Because T = O(log N ), one expects the infidelity to scale with log 2 N . The observed slope of 1.86 is somewhat smaller owing to the fact that, in our simulations, excitations are only susceptible to damping while they reside in the tree.
The scaling argument presented in this section also suffices to show that the noise resilience persists in two other interesting situations: when the QRAM is initialized in an arbitrary state, and when the routing circuit is modified. Regarding initialization, observe that the above argument is straightforwardly modified to cover the case where all routers are initialized in |1 rather than |0 . Indeed, such an argument holds regardless of whether a given router is initialized in |0 or |1 . It follows that the query infidelity scales favorably when the QRAM is initialized in an arbitrary state [49] (though some additional care must be taken when copying data to the bus-see Appendix B for details). This observation has great practical utility, as it means that QRAM can be constructed even from physical components that cannot reliably be initialized to a particular state.
Regarding modifications to the routing circuit, it is helpful to consider an example. In Ref. [35] a modified routing circuit was proposed in which one of the controlled-SWAP gates in Fig. 1(b) is replaced by a SWAP gate. This modification has nontrivial effects on how errors propagate. With the modified circuit, errors can propagate from bad branches into good branches even when three-level routers are used. However, this is the same sort of damaging error propagation as is illustrated in Fig. 6. Indeed, from the perspective of error propagation, the effect of this modification to the routing circuit is equivalent to replacing three-level routers with two-level routers. Accordingly, the argument above can be directly applied to show that the favorable scaling persists with the modified circuit. This example demonstrates that noise resilience is not a specific feature of the routing circuit [ Fig. 1(b)].
Taken together, the results from this section demonstrate that the noise resilience of the bucket brigade architecture is a robust property that is insensitive to implementation details. This observation affords a great deal of freedom to experimentalists in deciding how the routers and routing operations could be implemented in practice.

VI. HYBRID ARCHITECTURES
The bucket-brigade architecture allows one to perform queries in O(log N ) time using O(N ) qubits. This allocation of resources represents one extreme; at the other extreme are architectures [5,41,42] that perform queries in O(N log N ) time using O(log N ) qubits. In fact, there exists a family of architectures that interpolate between these two extremes to leverage this space-time tradeoff [18,19,33,39]. We refer to these as hybrid architectures, and in this section we study their noise resilience. We find that hybrid architectures can be imbued with a partial noise resilience when they employ the bucketbrigade QRAM as a subroutine. As a result, these hybrid bucket-brigade architectures can have significantly higher query fidelities than other architectures that require the same resources.
One of the primary benefits of the bucket-brigade architecture is that queries can be performed in only O(log N ) time. These fast query times are essential for algorithms that must rapidly load large classical data Depolarizing slope = 2.42 1 10 5 (b) 1 10 5 (c) 1 10 5 (d) 1 10 5  7. Favorable error scaling with two-level routers. For a variety of error channels, the query infidelity (black dots) is calculated numerically and plotted as a function of the tree depth log N . Linear fits for each data set are shown as dashed lines, with the corresponding slopes given on each plot. Fits are performed only on data points with log N ≥ 3 so that the slopes are not skewed by finite-size effects at small log N . Slopes ≤ 3 are consistent with the scaling argument in the text. The error rate for all plots is ε = 10 −4 . sets in order to claim exponential speedups over their classical counterparts, e.g., quantum machine learning algorithms [8][9][10][11][12]. However, the O(N ) hardware overhead that enables such fast queries is practically daunting, and not all algorithms require such fast queries in the first place. In algorithms that only require comparatively small data sets to be loaded, e.g. simulating local Hamiltonians [2][3][4][5][6][7], slower query times can be sufficient. Circuits that use fewer qubits at the price of longer query times are better suited for such algorithms. Fig. 8 provides a straightforward example of such a circuit. To query a memory of size N , a sequence of N multiply-controlled Toffoli gates is applied, where each gate has log N controls (the address qubits) and one target (the bus qubit). The circuit sequentially iterates over all N possible addresses, flipping the bus qubit conditioned on the corresponding classical data. The circuit requires only O(log N ) qubits, but it has depth O(N log N ), since each multiply-controlled Toffoli gate can be performed in depth O(log N ) [50]. Adopting the nomenclature introduced in Ref. [5], we refer to such circuits as Quantum Read-Only Memory (QROM). We note that this circuit can be further optimized to reduce the depth, as shown in Ref. [5]. We omit these optimizations for simplicity, as they do not affect our main conclusions concerning the effects of noise.
More generally, circuits can be constructed that trade longer query times for fewer qubits by combining QROM and QRAM, as shown in Fig. 9. We introduce a tunable  N ). Therefore, by tuning the parameter M , one can interpolate between large-width, small-depth circuits like QRAM, and small-width, large-depth circuits like QROM. The hybrid circuit reduces to QRAM for M = 1, and QROM for M = N . We note that the circuits we introduce in Fig. 9 are very similar to those in Refs. [18,19,33,39]. The main difference is that our circuits explicitly invoke QRAM as a subroutine, which makes the analysis of their noise resilience more straightforward.
Let us consider the effects of noise on these circuits. We first consider QROM, then turn to the hybrid circuits. One can easily observe that QROM does not possess any intrinsic noise resilience. For example, when all memory elements are queried in equal superposition [α i = 1/ √ N in Eq. (1)], a single dephasing error at any location in the QROM circuit reduces the query fidelity to 0. The effects of bit flips are similarly detrimental, assuming there is no contrived redundancy in the classical data. More generally, we can follow the approach of Section III and express the QROM query fidelity as F = c p(c)F (c), where the error configuration c specifies which Kraus operators are applied at each location in the circuit, and F (c) is the final state fidelity of the address and bus registers given configuration c. In the case of QROM, only the error configuration with no errors is guaranteed to have unit or near-unit fidelity in general [51]. There are O(N log 2 N ) possible error locations, so it follows that the QROM query infidelity scales as to leading order. Therefore, QROM is not noise resilient, since near-unit query fidelities generally require QRAM QRAM Add.
to leading order. Here again, error rates ε 1/N are required for near-unit query fidelity, neglecting logarithmic factors.
In contrast, the hybrid circuits do exhibit partial noise resilience when the QRAM subroutines are implemented with the bucket-brigade architecture. Because the bucket-brigade QRAM is resilient to noise, error configurations with errors occurring exclusively in the QRAM subroutines can still have high fidelities. We can obtain a lower bound on the query fidelity by neglecting all other configurations. Doing so allows us to bound the query fidelity by a product of two factors The first factor is simply the probability that no errors occur outside the QRAM. The second factor is the expected fraction of error-free branches within the QRAM (each branch contains log N/M routers, and there are T = O(M log N ) possible time steps at which errors may occur). We have related this expected fraction to F hybrid−BB by the same argument as in Section III. Thus, to leading order, Note that we have not kept track of prefactors since we are only interested in how the infidelity scales; a strict upper bound could be rigorously derived following the approach of Section III. Near-unit query fidelities only require error rates ε 1/M , neglecting logarithmic factors (cf. the ε 1/N requirement for the other cases). Because M ≤ N , the infidelity of the hybrid bucket-brigade architecture scales more favorably than both QROM and the hybrid fanout architecture. Of course, the extent of the scaling advantage depends on M . For example, if one chooses M = √ N , so that the number of qubits and circuit depth are comparable, then the hybrid bucketbrigade architecture yields a quadratic improvement in the infidelity scaling. Note that we assume three-level routers above for simplicity; for two-level routers, one should replace log N/M → log 2 N/M in the above expressions, in accordance with the argument from Section V.

VII. ERROR-CORRECTED QRAM
In this section, we show that the benefits of the bucket brigade scheme persist when quantum error correction is used. When the bucket-brigade QRAM is implemented using error-corrected routers and fault-tolerant routing operations [40,52], the logical query infidelity scales only polylogarithmically with the memory size. Thus, errorcorrected implementations of the bucket-brigade scheme can offer improved fidelity or reduced overhead relative to other implementations. In practice, these improvements may be tempered by the overhead associated with the fault-tolerant implementation of the routing operations, and we discuss the utility of the bucket-brigade architecture in light of such considerations.
While we have shown that the query infidelity of the bucket-brigade scheme scales favorably with the memory size, strategies to further suppress the infidelity are desirable, and quantum error correction provides one possible approach. Indeed, error correction may be required in cases where the physical error rate cannot be made sufficiently small, or when many queries must be performed in sequence. For example, Ref. [17] argued that error correction is likely to be needed for any algorithm that requires a number of QRAM queries that scales superpolynomially in log N , e.g., Grover's algorithm [25].
It is thus natural to ask whether an error-corrected bucket brigade QRAM offers any advantages over other architectures. Indeed, this question was previously considered in Ref. [17], where the authors argue in the negative. Their argument is based on the canonical attribution [10,12,[14][15][16][17] of the bucket brigade's noise resilience to the limited number of active routers. Error-corrected routers must be considered active, they argue, and so the number of active routers is the same in both the fanout and bucket brigade schemes. Hence, the bucket brigade scheme was not believed to provide any advantage if error correction were used.
As we have shown, however, the noise resilience of the bucket brigade scheme is not a function of the number of active routers, but rather a function of the limited entanglement among the routers. As a direct corollary of this result, we find that, in fact, the benefits of the bucket brigade scheme do persist when error correction is used. The proof from Section III is agnostic to whether the routers are composed of uncorrected physical qubits or error-corrected logical qubits, provided that uncorrectable logical errors occur independently with some probability ε L (which can be guaranteed by implementing the routing operations fault tolerantly). Physical errors occurring with probability ε can simply be replaced by logical errors occurring with probability ε L , and one obtains the corresponding bound where F L is the query fidelity of the logical QRAM circuit, and T L is the circuit depth. Thus, when implemented fault-tolerantly, the logical bucket-brigade circuits possess an intrinsic resilience to logical errors, in that the logical infidelity scales only polylogarithmically with the the size of the memory (This scaling assumes T L = O(log N ); see further discussion at the end of this section).
To provide further exposition, we give a concrete example of an error-corrected quantum router. Consider a quantum error correcting-code, with logical codewords |0 L and |1 L satisfying the Knill-Laflamme conditions [40,53], where P is the projector onto the code space, the {K i } are the set of correctable errors, and h is a Hermitian matrix. A logical two-level quantum router then constitutes a single logical qubit (similarly, a logical three-level quantum router can be constructed from a pair of logical qubits, for example). Crucially, the logical routers comprising the QRAM can be corrected without revealing any information about which memory elements are being accessed. This is because the conditions (46) guarantee that errors can be corrected without revealing any information about the encoded state. Even when the logical router is in a superposition of different states, or entangled with other routers, syndrome measurements do not reveal information about the router state. Note that the conditions (46) also guarantee that information is not leaked to the environment; the states |0 L and |1 L necessarily have equal probability of suffering errors. Because of the favorable logical error scaling Eq. (45), error-corrected implementations of the bucket-brigade scheme can offer improved fidelity or reduced overhead relative to other implementations. For instance, if the same error-correcting code is used in fault-tolerant implementations of the bucket-brigade and fanout QRAMs, the logical infidelity of bucket brigade QRAM will be lower than the logical infidelity of the fanout QRAM by a factor of ∼ 1/N in general. Alternatively, if a given application requires that QRAM have a logical infidelity below some threshold, the error-correction overhead required to realize such high-fidelity queries can be significantly smaller for the bucket-brigade scheme relative to the fanout scheme. Indeed, even if the reduction in errorcorrection overhead is fairly small for each router, the total overhead reduction considering all N routers can be significant. Such reductions could be of significant practical benefit. For context, we note that detailed overhead estimates for fault-tolerant QRAM using the surface code were made in Ref. [18]; these overheads can potentially be improved by exploiting the bucket-brigade's noise resilience.
We conclude this section with an important caveat concerning fault-tolerant QRAM.

VIII. DISCUSSION
We have shown that the bucket-brigade QRAM architecture possesses a remarkable resilience to noise. Even when all O(N ) components comprising the QRAM are subject to arbitrary error channels, the query infidelity scales only polylogarithmically with the memory size. As a result, the bucket-brigade architecture can be used to perform high-fidelity queries of large memories without the need for quantum error correction, provided physical error rates are low. Importantly, we prove that this noise resilience holds for arbitrary error channels, demonstrating that a noise-resilient QRAM can be implemented with realistically noisy devices.
In the near-term, this noise resilience could facili-tate experimental demonstrations and benchmarking of numerous quantum algorithms. We are presently in the Noisy, Intermediate-Scale Quantum (NISQ) era [60], when making more qubits is easier than making better qubits. The same is likely to be true even in the era of early fault-tolerance. In these eras, the bucketbrigade architecture-with its larger overhead and noise resilience-could actually prove to be more practical than alternatives like QROM (see Section VI) that have a lower overhead but are less tolerant to noise. The bucket-brigade architecture thus more readily enables small-scale, near-term implementations of algorithms, and important practical insights are likely to be gained from such demonstrations. Schemes to further suppress the query fidelity without resorting to full error correction [61] could prove useful in this effort.
In the long-term, this noise resilience may prove useful in facilitating speedups for certain quantum algorithms, but it is important that the required resources be carefully assessed before a speedup via QRAM is claimed. Consider an oracle-based algorithm that requires n qubits (not including ancillary qubits needed to implement the oracle). As we show in Table II, such algorithms can be conveniently classified according to how the size of the classical memory being queried, N , and the total number of queries, Q, scale with n. Assuming poly(n) query times are required, the memory size N dictates whether QRAM (as opposed to QROM or a hybrid architecture) is required to implement the oracle. The number of queries Q dictates whether error correction is necessarily required [17]. The noise resilience of the bucket-brigade has the biggest potential impact in case of N = exp(n) and Q = poly(n). In this case, QRAM is required, and the noise-resilience of the bucket-brigade architecture, to-gether with the comparatively small number of queries, allows for the possibility that the QRAM could be implemented without error correction. Of course, the noise resilience can also be advantageous in the other cases, where hybrid architectures may be employed (Section VI) or when error correction is used (Section VII).
Finally, it is worth emphasizing that the results in this paper constitute general statements about the bucketbrigade architecture, independent of its application to particular algorithms. In fact, the architecture may prove useful in applications other than facilitating algorithmic speedups. For example, Ref. [29] employs the bucketbrigade architecture in a quantum cryptographic protocol. The architecture may similarly prove useful for quantum communication or metrology. Exploring applications of the bucket-brigade architecture-and the utility of its noise resilience-in these other contexts represents an interesting direction for future research. In particular, applications involving quantum queries of quantum data remain largely unexplored. Searching an unstructured database [25] exp(n) poly(n) QRAM Maybe not Solving linear systems of equations [30] (sparse, well-conditioned systems) poly(n) poly(n) QRAM, QROM, Hybrid Maybe not Simulating local Hamiltonians [62] TABLE II. Algorithm categorization. Algorithms are sorted based on how the size of the classical memory, N , and the number of queries, Q, scale with the number of qubits, n. When N = exp(n), QRAM is the only suitable architecture, assuming poly(n) query times are required. When Q = poly(n) quantum error correction may not be required, depending on the physical error rates. For the examples in the last two rows, Q also depends on the particular algorithm used and the desired precision; we assume these are chosen such that Q = poly(n). We omit the case of N = poly(n) and Q = exp(n), for which the query complexity is exponential in the problem size. Fig. 10 shows a circuit diagram for the bucket-brigade QRAM in the case of an N = 8 cell memory. In contrast to the T = O(log 2 N ) depth circuits described implicitly in Refs. [14,15,17], the circuit depth here is only T = O(log N ). The quadratic speedup is due to additional parallelization of the routing operations that we now describe.
In Refs. [14,15,17], address qubits are routed into the tree one at a time; the ( + 1)-th address qubit is only injected into the tree once the -th address qubit has taken its position at level of the tree. If each routing operation takes one time step, then one waits time steps between the injection of the -th and ( + 1)-th address qubits. The total circuit depth is obtained by summing the number of time steps that it takes for each address to reach the corresponding level, However, it is not necessary to wait for an address qubit to reach its destination before subsequent address qubits are sent into the tree, and this realization enables the circuit depth to be reduced to O(log N ). Notice that the routing operations for routers located at even levels of the tree act on mutually disjoint qubits and hence mutually commute (the same is true for the odd levels). Thus, all routing operations at either even or odd levels can be performed in parallel. In practice, then, once an address qubit has reached level = 2, the next address qubit can be sent into the tree at level = 0, and the two can be routed in parallel. This way, the wait time between the injection of subsequent address qubits into the tree is constant (cf. the O( ) wait time above). Exploiting this additional parallelism, the total circuit depth is reduced to T = O(log N ). The circuit diagram in Fig. 10 illustrates how such T = O(log N ) bucket-brigade QRAM circuits are structured. The circuit is a sequence of T constant-depth circuits U t . During each block U t , a subset of the possible routing operations is performed (orange boxes in the figure), with routing operations at even levels performed before routing operations at odd levels. Importantly, because the operations at even levels can be performed in parallel (sim. for odd levels), each orange box constitutes only two layers of parallel gates. In principle, new address qubit can then be injected into the tree at the beginning of each orange box, with routing performed in parallel whenever multiple address qubits are being routed through the tree. The case of N = 8 shown in the figure is too small to demonstrate this parallelism, but to see how the parallelism would manifest at larger memory sizes, notice that it would be possible to inject another qubit into the tree during U 5 and route this qubit (at level = 0) in parallel with one at level = 2.
Appendix B: Copying data to the bus In this section, we explicitly describe how classical data can be copied into the state of the bus. Slightly different procedures are required depending on whether the QRAM is implemented with two-level or three-level systems, and whether the QRAM is initialized in a known state or in some arbitrary state (see Section V).
We begin with the case where the QRAM is implemented with two-level routers, as described in Section V. Each router's incident and output modes are also taken to be physical two-level systems. All routers and their respective modes are initialized to |0 . For reasons that will become apparent shortly, we suppose that the bus qubit is initialized to |+ ≡ (|0 + |1 )/ √ 2 prior to the query. During the query, this bus qubit is routed down the tree, to an output mode of some router at the bottom level. At this point, classical data is encoded into the state of the bus qubit by applying classically controlled Z gates, as illustrated in Fig. 11(a). If the memory element being queried is 1, a Z gate is applied, and the state of the bus is flipped from |+ to |− ≡ (|0 −|1 )/ √ 2. If the memory element queried is 0, no Z gate is applied, and the bus remains in |+ . In this way, the classical bit is encoded in the |± basis of the bus qubit. Note, however, that because the location of the bus is not known, classically controlled Z gates must be applied to the output modes of all routers at the bottom level of the tree.
This data copying operation has a crucial property, which we call no extra copying: in the absence of errors, the copying operation acts trivially on all modes that do not contain the bus qubit. In the above case, all modes that do not contain the bus are in |0 , so they are unaffected by the Z gates, hence why we use the |± basis for the bus [35]. The no extra copying property is crucial because it guarantees that the final state of the tree is the same across all good (error-free) branches, as required by the arguments in the main text. Were this property not to hold, the final state of the tree would depend on which element was queried, so the bus would remain entangled with the routers after the query, even in the absence of errors. Now let us consider the case where the QRAM is implemented with three-level routers, as described in Sections II and III. Each router's incident and output modes are taken to be physical three-level systems, whose basis states we also label as |0 , |1 , and |W . The address and bus qubits are encoded within the |0, 1 subspace of such three-level systems. Prior to the query, all routers, as well as their incident and output modes, are initialized to |W , and the bus is initialized to |0 . During the query, the bus is routed to an output mode of some router at the bottom level of the tree. Data is copied into the bus by applying classically controlledX gates to the output modes [ Fig. 11(b)], wherẽ If the memory element being queried is 1, theX gate is applied, and the state of the bus is flipped from |0 to |1 . If the memory element queried is 0, noX gate is applied, and the bus remains in |0 . In this way, the classical bit is encoded in the |0, 1 basis of the bus qubit (one could also choose to encode the information in the |± basis by constructing an analogousZ gate). Here again, the classically controlled gates must be applied to the output modes of all routers at the bottom of the tree. This operation satisfies the no extra copying property because, in the absence of errors, all modes not containing the bus are in |W , on whichX acts trivially.
In order to enforce the no extra copying property, both of the above data copying operations rely on the fact that the routers, as well as their input and output modes, are initialized to some known state. When the QRAM is initialized in an arbitrary state (see Section V), however, additional care must be taken to ensure this property still holds. The challenge is that the mode that actually contains the bus must somehow be distinguished from all the other modes, which may have been initialized in the same state as the bus. This problem is solved by the circuit in Fig. 11(c). The QRAM is queried twice, and the no extra copying property is guaranteed by the fact that the entire QRAM unitary operation is idempotent. In particular, even if the process of copying data during the first query acts non-trivially on modes not containing the bus, these modes are always reset to their initial states by the second query. In fact, even the bus is reset to its initial state by the second query. Thus, the information stored in the bus is copied to an ancillary qubit in between the two queries, then swapped back into the bus after the second query. We emphasize that the query fidelity of this circuit scales favorably, which can be shown by simply replacing T → 2T in the scaling argument from Section V to account for the fact that the QRAM is called twice.
As an aside, let us distinguish between our observation that QRAM is resilient to noise even when initialized in an arbitrary state (Section V), and the observation of Refs. [33,39] that the ancillary qubits used to perform a query can be "dirty." The latter states that circuits can be designed such that, in the absence of errors, any ancillary qubits used during the query are returned to their initial state after the query, regardless of what the initial state was (note the circuit in Fig. 11(c) has this property). In contrast, our observation concerns what happens when errors occur during the query: the query infidelity of the circuit Fig. 11(c) scales favorably even when the QRAM is initialized in an arbitrary state.

Appendix C: Error channel Kraus decompositions
In this Appendix, we give the Kraus decompositions for the channels used in our simulations. We specify a generic channel E as via a list of its Kraus operators as (C1)

Qubit error channels
Let X, Y, Z denote the Pauli matrices. The decompositions of the qubit error channels are

Qutrit error channels
We follow the definitions for qutrit depolarizing, bitflip, and dephasing channels given in Refs. [66], [17], and [67], respectively. Define the operators where the matrices are written in the {|W , |0 , |1 } basis, and ω = e i2π/3 . The decompositions of the qutrit error channels are Appendix D: Proof of noise resilience for arbitrary error channels In this Appendix, we prove that, for arbitrary error channels, the QRAM query infidelity satisfies the bound where A is a constant of order 1 (defined below). We begin by defining the error model and introducing some convenient notation.

Error model
We suppose that at each time step, every router in the QRAM is subject to an error channel E of the form One could also consider situations where different routers are subject to different error channels; the proof straightforwardly extends to such situations. For the moment, we make two additional assumptions that simplify the proof. First, we restrict our attention to channels with Kraus rank two, i.e. channels that can be expressed with only two non-zero Kraus operators, K 0 and K 1 . Second, we assume that each router is subjected to the error channel E only once, at the time step t * after all addresses have been routed into place and immediately before the bus enters the tree (this time step is the one illustrated in Figs. 1 and 2). We relax both of these assumptions later on. Let us define the error rate, ε. For a generic state |ψ , we may write where ψ|ψ ⊥ = 0, and a ψ ,b ψ are complex numbers. We define ε as the smallest positive real number such that, for any |ψ , we have and for any collection of arbitrary states |ψ i , we also have This definition is unconventional, so let us emphasize that ε can be understood as quantifying the distance between E and the identity channel. Specifically, for any given ε 0 ∈ [0, 1], there always exists some δ ∈ [0, 1] such that, whenever |E − I| < δ according to some distance metric, then ε < ε 0 . We adopt this definition of ε because it turns out to be very convenient for the proof. For example, it follows that and, for a generic product state, |ξ m = m i=1 |ψ i , where it follows from Eqs. (D4) and (D5) that for m ≤ log N .

Notation
We now define some convenient notation. As in the main text, we use the shorthand to denote the composite Kraus operator acting on all routers in the tree. Here, K c(r) ∈ {K 0 , K 1 } denotes the Kraus operator applied to router r at time t * as specified by the error configuration c. For the i-th branch of the tree, we also define the operator K c ∈i as that obtained by taking K c and replacing K c(r) → I for any router r in branch i: Similarly, for a pair of branches, i and j, we analogously define where r ∈ i ∪ j denotes the set of routers in either branch i or j.
Additionally, we define |R i to be the ideal state of the routers at time t * assuming the i-th memory element is queried. Specifically, |R i is a computational basis state for which all routers r ∈ i are in the state |W , and routers r ∈ i are in either |0 or |1 and carve out a path to the memory element i. As examples, |R 101 is illustrated in Fig. 1(d), and the superposition |R 000 + |R 010 + |R 011 + |R 101 + |R 110 is illustrated in Fig. 2.
Finally, throughout the proof it will be convenient to work with unnormalized quantum states. We distinguish between normalized states |ψ and unnormalized states |ψ with an overbar.

Proof
Our proof of QRAM's noise resilience for generic error channels follows the same outline as the proof for mixedunitary error channels given in the main text. We again begin by defining the final state of the system Ω as an incoherent mixture over final states for different error configurations c, in analogy to Eq. (11). Here, the final system state given error configuration c is Ω(c) = |Ω(c) Ω(c)|, where |Ω(c) is the unnormalized state where the superscripts A, B, R denote the addresses, bus, and routers, respectively. In accordance with the error model described in Appendix D 1, the quantity in square brackets is the ideal state of the system at time t * with errors K c subsequently applied to the routers. The unitary V comprises all operations performed after time t * . Namely, V routes the bus to memory, copies data into the bus, then routes the bus and all address qubits out of the tree. Note that K c is not unitary, and the states |Ω(c) are not normalized. The probability p(c) of error configuration c occurring is The query fidelity is given by in analogy to Eqs. (12) and (13). As in the main text, we proceed by placing a lower bound on F (c). To do so, we write in analogy to Eq. (16), and where the definitions of |good(c) and |bad(c) will be given shortly. Let us recall the definition of good and bad branches given in the main text. There, a branch i was defined to be good if and only if i ∩ c = ∅, where i is the set of routers in the i-th branch of the tree, and c is the set of routers which have K m>0 applied to them according to error configuration c. We retain this definition here. Now, in main text we considered the case of mixed-unitary error channels, for which K 0 ∝ I, and for these channels we have that for all i ∈ g(c), where g(c) denotes the set of good branches. In words, Eq. (D20) says that effect of the of no-error operators on the active routers is trivial. However, in the present case of general channels, for which K 0 = I in general, the no-error backaction associated with K 0 can alter the states of active routers. In particular, for all i ∈ g(c), and where |R ⊥ i denotes an orthogonal state, R i |R ⊥ i = 0. It follows from Eqs. (D8) to (D10) that the coefficients a Ri and b Ri satisfy In words, Eq. (D21) says that effect of the of no-error operators on the active routers is nontrivial and places the active routers in a superposition of the ideal state and some orthogonal state. Eqs. (D22) and (D23) bound the coefficients in this superposition; in the relevant regime of ε log N 1, this nontrivial, no-error backaction is small, and the state K c |R i is close to K c ∈i |R i . Now, let us define |good(c) and |bad(c) in Eq. (D19). Given Eq. (D21), it will be convenient to separate the ideal and non-ideal components of K c |R i , retaining only the ideal components in |good(c) . We thus define in analogy to Eq. (17), and Note that |bad(c) not only contains a contribution from the bad branches, j ∈ g(c), but also from the no-error backaction in the good branches, i ∈ g(c).
We now seek to prove analogous statements to Eqs. (20) and (21) (given by Lemmas 2 and 3 below). To do so, we first show that the overlap of |good(c) and the ideal state is large in the following sense. Lemma 1. The overlap between |good(c) and the ideal final state, |ψ out , f (c) , satisfies the bound where Λ(c) = i∈g(c) |α i | 2 is the weighted fraction of good branches, |f (c) is some fixed final state of the routers (defined below), and with ε W ≡ 1 − W |K † 0 K 0 |W , and |c| denotes the number of Kraus operators K m>0 in the composite Kraus operator K c , i.e. |c| is the number of errors.
Proof. Consider a good branch i ∈ g(c). We have that because all active routers in K c ∈i |R i R are in their ideal states, so the query succeeds. Here, is the unnormalized final state of the routers associated with branch i. Consider a second good branch, j ∈ g(c), with j = i. In general, the final state of the routers with respect to branch j may be different from the final state with respect to branch i, i.e. |f i (c) = |f j (c) . As a result, the routers may be entangled with the address and bus in |good(c) . However, we now show that the overlap f i (c)|f j (c) is large, such that the routers are nearly disentangled from the address and bus in |good(c) . Recall the definition of K c ∈i,j [Eq. (D13)] as the operator obtained by taking K c and replacing all Kraus operators acting on routers in branches i and j with the identity. Observe that where it follows from Eqs. (D8) to (D10) that Now, the overlap is given by To obtain Eq. (D34) we have used the fact that because by definition K c ∈i,j |R ⊥ i has at least one active router in an orthogonal state relative to |R i , so that after the application of V the final address state is necessarily perpendicular to |i . To obtain Eq. (D35) we have used the fact that the two states in brackets in Eq. (D34) are in fact the same. This is because both K c ∈i,j |R i and K c ∈i,j |R j have routers in branches i and j in their ideal states. As articulated in the main text and illustrated in Fig. 5, it follows that the propagation of errors is constrained in such a way that the final states of the routers (the states in brackets) are the same.
Continuing with our calculation of f i (c)|f j (c) , note that the norm |K c ∈i,j |R i | 2 can be computed straightforwardly using the fact both that K c ∈i,j and |R i are tensor products over the different routers. We obtain, where |c| is the number of Kraus operators K m>0 in the composite Kraus operator K c , i.e. |c| is the number of errors. We have used the definition W |K † 1 K 1 |W = ε W , which implies W |K † 0 K 0 |W = 1−ε W . Thus, combining Eqs. (D31), (D35) and (D37) the real part of the overlap can be bounded as where q(c) is defined in Eq. (D27). More convenient for our purposes is the equivalent bound where |f i (c) is the normalized version of |f i (c) , and we have used the fact that f i (c)|f i (c) = q(c)/(1 − ε W ) log N . Now, for any i ∈ g(c), consider the overlap, where the second line follows from Eq. (D28). Using Eqs. (D22) and (D39), we can bound the real part of this overlap as completing the proof.
The result of Lemma 1 is not precisely analogous to Eq. (20). Rather, the analogous statement is Lemma 2 (see below), which also incorporates detrimental effects of |bad(c) . To incorporate these effects, it is convenient to write are the components of |bad(c) perpendicular and parallel to |good(c) , respectively. We proceed by first quantifying the detrimental effects of |bad(c) .
Lemma 2. The overlap of |good(c) + |bad(c) with the ideal state can be bounded as with B ≈ 1 in the relevant limit of ε log N 1.
Proof. We prove the result by showing that the overlap of |bad(c) and |good(c) is small relative to magnitude of |good(c) . Specifically, we prove that Then, because |good(c) + |bad(c) is parallel to |good(c) , and because its magnitude is bounded from below by (1 − Bε 2 )|| |good(c) ||, the lemma follows. First, we consider the magnitude of |good(c) , good(c)|good(c) = i,j∈g(c) Using Eq. (D22) together with the fact that R i |K † c ∈i K c ∈i |R i = q(c)/(1 − ε W ) log N , we can bound this overlap as Next, we consider the overlap of |good(c) and |bad(c) , given by where we enforce j = i in the second line by noting that R i |K † c ∈i K c ∈i |R ⊥ i = 0.
Remark 1. A subtle, but important point is that we can actually further enforce j = i + 1, for i odd, (D54) j = i − 1, for i even, (D55) in summation indexed by j in Eq. (D53). This is because, for i even, branches i and i + 1 share the same active routers, and can be grouped together when using Eq. (D21) to define of |good(c) and |bad(c) . With these slightly modified definitions, |good(c) contains the state K c ∈i (α i |R i + α i+1 |R i+1 ), and |bad(c) contains the orthogonal state K c ∈i (α i |R i + α i+1 |R i+1 ) ⊥ . It follows that the j = i + 1 terms vanish in Eq. (D53) for even i. The j = i − 1 terms vanish for odd i by the same argument. To keep the notation simple, however, we will continue to simply write j = i and reference this Remark whenever this distinction is relevant. The first term in Eq. (D53) can be simplified using the relation which is equivalent to Eq. (D21). Inserting this expression into Eq. (D53) yields good(c)|bad(c) = i∈g(c) j =i which we have simplified using the fact that R i |K † c ∈i K c ∈j |R j = δ ij . Eq. (D57) may be equivalently expressed as an inner product between two N -dimensional complex vectors, α g and M α, where the i-th entry of the vector α is α i , the i-th entry of α g is and M is an N × N complex matrix with entries M ij = R i |K † c ∈i K c |R j (1 − δ ij ). Consider the quantity R i |K † c ∈i K c |R j , with i ∈ g(c) and j = i. Since all states and operators involved are tensor products, this term is a product of N − 1 matrix elements, one for each of the N − 1 routers. We now enumerate these matrix elements, first assuming j ∈ g(c). Of the N − 1 matrix elements, (N − 1) − 2 log N − |c| elements are W |K † 0 K 0 |W = 1 − ε W , corresponding to error-free routers outside both branches i and j. (There may be additional such elements, depending on how many routers i and j share, see Eq. (D60) below). With j ∈ g(c), an additional |c| matrix elements are W |K † 1 K 1 |W = ε W , corresponding to routers that suffer errors. The remaining 2 log N matrix elements can be enumerated as follows. For a given state |R i , let |R The absolute values of these products can be bounded using Eqs. (D4) and (D5), where the bound on the first line is tighter for = ij because R (D78) where, to simplify notation, we have defined Now, recall that the query fidelity is given by F = c F (c). We can equivalently express the query fidelity as an expectation value with respect to the distribution q(c) as The utility of expressing F this way will be made apparent shortly. Analogously to Eqs. (25) and (26) in the main text, we can then bound the query fidelity as where the inequality follows from recognizing the sum as the Bhattacharyya distance between the distributions p and q. We also have which follows from a recursive calculation nearly identical to the one described in the main text. Thus, we find in analogy to Eq. (27). Employing Bernoulli's inequality, we obtain assuming ε W log N + 4C(1 − ε W log N ) ≤ 1/4. Equivalently, Let us simplify this bound on the infidelity so that the scaling with N is evident. We use Bernoulli's inequality again to obtain the bound Inserting this bound, and using the definition of B, we find where we have defined In the relevant limit of ε log N 1, the coefficient A is well-approximated by keeping only the leading order terms, Notice that, for mixed-unitary error channels, for which ε W = ε, we have A ≈ 4, in agreement with the proof in the main text. This concludes the proof of the favorable error scaling, Eq. (D91). Recall, however, that we have made two simplifying assumptions. As described in Appendix D 1, we have assumed that errors are only applied at one time step and that the error channel has a Kraus rank of 2. It remains to relax these assumptions, and we do so in the following subsections.
Error channels with Kraus rank = 2 The proof can be straightforwardly adapted to handle the case of channels with Kraus rank = 2. First, let us consider the case of Kraus rank = 1, for which the error channel contains a single unitary Kraus operator K 0 . This case can be understood as describing coherent errors in the routers and is actually already covered by the above proof. One simply sets K 1 = 0, and the bound Eq. (D91) holds.
Next we consider the Kraus rank > 2 case. We define two error configurations, c and c , to be similar if and only if K c(r,t) = K 0 ⇐⇒ K c (r,t) = K 0 . That is, error configurations are similar if errors occur at the same locations, though which error K m>0 occurs at a given location can differ. We further define c's similar set as the set of all configurations c that are similar to c.
Let |c m | denote the number of errors K m>0 in configuration c. We generalize the definition of q(c) as where |c| = m |c m |. Recall that ε W ≡ 1 − W |K † 0 K 0 |W . Then, because as a consequence of the Kraus operators' completeness relation, the total probability of obtaining any configuration from c's similarity set is This quantity matches the definition of q(c) for the Kraus rank = 2 case. Therefore, by grouping all error configurations in the same similarity set together, the proof proceeds exactly as above. In other words, the proof is agnostic to the kind of errors that occur; so long as the total probability of any error occurring is fixed, the result is the same.