Abstract
We study the effect of gate-induced electric fields on the properties of semiconductor-superconductor hybrid nanowires which represent a promising platform for realizing topological superconductivity and Majorana zero modes. Using a self-consistent Schrödinger-Poisson approach that describes the semiconductor and the superconductor on equal footing, we are able to access the strong tunneling regime and identify the impact of an applied gate voltage on the coupling between semiconductor and superconductor. We discuss how physical parameters such as the induced superconducting gap and Landé factor in the semiconductor are modified by redistributing the density of states across the interface upon application of an external gate voltage. Finally, we map out the topological phase diagram as a function of magnetic field and gate voltage for InAs/Al nanowires.
9 More- Received 3 February 2018
DOI:https://doi.org/10.1103/PhysRevX.8.031041
Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article’s title, journal citation, and DOI.
Published by the American Physical Society
Physics Subject Headings (PhySH)
Popular Summary
Practical quantum computers will depend on the implementation of robust quantum bits (qubits) to store and process information. Majorana zero modes, electron-hole superpositions that provide exponential protection against external noise, are ideal states to realize reliable qubits. However, the systems supporting Majorana modes exhibit complex behavior that obscures desired experimental signatures and makes the design of Majorana-based qubits a challenge. Here, we develop a comprehensive quantitative theoretical treatment aimed at understanding such complex behavior in semiconductor-superconductor nanowires that support Majorana modes.
Our model treats the strong-coupling regime between the semiconductor and superconductor on an equal footing, and it shows the effects of both disorder and external electric fields. We show how physical parameters, such as the semiconductor’s induced gap and the Landé factor, are affected by the presence of external fields and disorder. We then obtain the topological phase diagram as a function of the experimental control parameters, magnetic field, and gate voltage, taking into account the presence of disorder.
By showing how the topological state can be tuned via external gates and how it is affected by the presence of disorder, our results provide useful guidance for the fabrication and tuning of devices aiming to realize Majorana-based topological qubits, the next step toward the realization of a topologically protected and, therefore, fault-tolerant quantum computer.