Two-dimensional defect mapping of the ${\mathrm{SiO}}_2/4H\text{−}\mathrm{SiC}$ interface

Current generations of 4H-SiC metal-oxide-semiconductor field-effect transistors are still challenged by the high number of defects at the ${\mathrm{SiO}}_2/\mathrm{SiC}$ interface that limit both the performance and gate reliability of these devices. One potential source of the high density of interface defect states ($D_{it}$) is the stepped morphology on commonly used off-axially grown epitaxial surfaces, favoring incomplete oxidation and the formation of defective transition layers. Here we report measurements on intentionally modified 4H-SiC surfaces exhibiting both atomically flat and stepped regions where the generation of interface defects can be directly linked to differences in surface roughness. By combining spatially resolving structural, chemical, optical, and electrical analysis techniques, a strong increase of $D_{it}$ for stepped surfaces was revealed while regions with an atomically flat SiC surface exhibited close-to-ideal interface properties.

Figure 1

Schematic of an off-axis surface showing both micro- and macrosteps as observed on commercial 4H-C epitaxial surfaces. The subnanofacets at the riser exhibit different orientations commonly described with a Miller index of ($11\overline{2}x$). The terrace along the (0001) basal plane is atomically flat with only some sparsely distributed single steps as indicated on the terrace on the right. Note that the off-axis angle (the most common of these are $4^{\circ }$) is exaggerated in this sketch.

Figure 2

(a) AFM images of an unprocessed (0001) 4H-C epitaxial surface showing a random distribution of isolated macrosteps. (b) Isolated macrostep consisting of a double-peak with atomically flat terraces and a faceted riser in between. The phase image (bottom left) also shows the microstepping of the surface away from the macrostep. (c) Surface morphology after the Si-melt process and subsequent Si removal. (d) A zoom-in view of a macrostep in (c) showing two wide terraces separated by a riser facet composed of several smaller steps. The white stripe in the phase map is a measurement artifact. Note that the scan sizes of (b) and (d) are different.

Figure 3

EELS profiles (left) with traces of carbon, oxygen, and ${\mathrm{SiO}}_x{\mathrm{C}}_y$ and corresponding dark-field STEM images (right) from (a) an atomically flat region of a terrace, (b) a single step of a terrace, (c) a nonmodified surface with microsteps, and (d) a step-bunched macrostep riser. For the EELS line profiles, EELS spectra were averaged over a 2 nm large area parallel to the interface. In (a), also a reference ${\mathrm{SiO}}_x{\mathrm{C}}_y$ profile of a deposited ${\mathrm{SiO}}_2/\mathrm{SiC}$ interface is shown (shaded area) where no transition region is expected. In the case of the atomically flat terrace, both the C signal and the ${\mathrm{SiO}}_x{\mathrm{C}}_y$ spectrum overlap perfectly with the reference sample.

Figure 4

(a) Schematic of the confocal microscope. A laser is directed onto a dichroic mirror via a fiber and directed on the sample which is mounted on an $xyz$ stage. The PL emission is guided through another fiber and detected with a single-photon avalanche photodiode. (b)–(e) Reflectivity (top) and confocal PL maps (bottom) of (b), (d) a modified surface after the Si-meld process with flat terraces and stepped risers and (c), (e) a common microstepped surface. The reflectivity maps were measured without the 532 nm long pass filter and at a greatly reduced laser power. The bright vertical lines along the $\langle 1\overline{1}00\rangle$ axis in the confocal PL maps indicate a higher defect density for the riser facets.

Figure 5

PL spectra of the ${\mathrm{SiO}}_2/\mathrm{SiC}$ interface with three different SiC surface morphologies. An increased density of defects is observed at the stepped risers, whereas the atomically flat terraces show lower intensities compared to the unmodified microstepped SiC surface.

Figure 6

(a) Schematic of the local-DLTS setup, adapted from [25]. (b) $D_{it}$ map for a sample with enhanced macrosteps. The oxide thickness on terraces and risers was estimated to be 7 nm and 11 nm, respectively. (c) $D_{it}$ map for an unmodified SiC surface with 8 nm thermally grown ${\mathrm{SiO}}_2$ on top. For both $D_{it}$ maps, $E_{it}=0.38\mathrm{eV}$.