Third Law of Thermodynamics and the Scaling of Quantum Computers

The third law of thermodynamics, also known as the Nernst unattainability principle, puts a fundamental bound on how close a system, whether classical or quantum, can be cooled to a temperature near to absolute zero. On the other hand, a fundamental assumption of quantum computing is to start each computation from a register of qubits initialized in a pure state, i.e., at zero temperature. These conflicting aspects, at the interface between quantum computing and thermodynamics, are often overlooked or, at best, addressed only at a single-qubit level. In this Letter, we argue how the existence of a small but finite effective temperature, which makes the initial state a mixed state, poses a real challenge to the fidelity constraints required for the scaling of quantum computers. Our theoretical results, carried out for a generic quantum circuit with $N$-qubit input states, are validated by test runs performed on a real quantum processor.

Figure 1

Scaling of the fidelity $\mathcal{F}({\rho }_0,{\sigma }_0)$ as a function of the number $N$ of qubits (in log scale), as predicted by Eq. (4), for different single-qubit error rates $\eta =1-(1+e^{-\beta \mathrm{\Delta }E}{)}^{-1}$.

Figure 2

Measured fidelity values of the state ${\sigma }_0$ on the ibm-lagos quantum computer as a function of the number $N$ of reset qubits. The dashed line denotes the theoretical fit on the measured data using Eq. (4). In the inset, we show the same plot but with the theoretical fit extended to 100 qubits; the log scale on the $x$ axis is used for visualization purposes. Error bars over the measured values are computed by assuming that error fluctuations follow a Gaussian distribution.

Figure 3

Measured fidelity between the quantum computational state ${\sigma }_0$ and the density operator ${\rho }_K$, solution of the conditional reset protocol, as a function of $K$. The circle markers represent conditional resets on a single-qubit register, while the cross markers represent the conditional resets on a 7-qubits register. Dashed lines refer to consecutive resets without delay and dash-dotted lines to resets with a delay of $500\mu \mathrm{s}$ between them. The error bars are smaller than the size of the markers.