Environment-Assisted Tunneling as an Origin of the Dynes Density of States

We show that the effect of a high-temperature environment in current transport through a normal metal–insulator–superconductor tunnel junction can be described by an effective density of states in the superconductor. In the limit of a resistive low-Ohmic environment, this density of states reduces into the well-known Dynes form. Our theoretical result is supported by experiments in engineered environments. We apply our findings to improve the performance of a single-electron turnstile, a potential candidate for a metrological current source.

Figure 1

(a) Geometry of the measured single NIS junctions made of aluminum (low contrast) as the superconductor and copper (high contrast) as the normal metal. The tapered ends lead to $250\times 250\mu {\mathrm{m}}^2$ pads. (b) Typical $IV$ characteristics, measured at 50 mK for a sample with $R_T=30\mathrm{k}\Omega$. Linear leakage is observed deep in the gap region $|eV|\ll \Delta \simeq 200\mu \mathrm{eV}$, consistent with the Dynes model using $\gamma =1.8\times {10}^{-4}$, shown by the cyan line.

Figure 2

The probability density $P(E)$ calculated for $\sigma ={10}^{-3}=R{T}_{\mathrm{env}}{k}_B/(R_Q\Delta )$ and for a few values of the environment temperature $T_{\mathrm{env}}=0.042$, 0.42, and 4.2 K. The dotted line is the corresponding Lorentzian limit of Eq. (4). The left inset shows the employed circuit model of an NIS junction (the rectangular symbol at the bottom right) in an $RC$ environment. The right inset shows the calculated zero-bias conductance of the NIS junction as a function of the capacitance $C$ with the environment corresponding to $\sigma ={10}^{-3}$ and $T_{\mathrm{env}}=0.42$, 4.2, and 42 K. We use $\Delta =200\mu \mathrm{eV}\simeq k_B\times 2.3\mathrm{K}$ for aluminum.

Figure 3

Measured $IV$ curves of an NIS junction with $R_T=761\mathrm{k}\Omega$ on the ground plane (solid symbols) and of a similar junction with $R_T=627\mathrm{k}\Omega$ without the ground plane (open symbols). Solid lines present the results of the full $P(E)$ theory for capacitance $C=10\mathrm{pF}$ (red line) and $C=0.3\mathrm{pF}$ (green line). The resistance and the temperature of the environment are set to $R=2\Omega$ and $T_{\mathrm{env}}=4.2\mathrm{K}$, respectively, and $\Delta =200\mu \mathrm{eV}$. The dashed lines correspond to the Dynes model with the parameters yielding the best fit to the data. The normalized zero-bias slope is $5.3\times {10}^{-4}$ for the green line and $2.6\times {10}^{-5}$ for the red line. The inset shows $IV$ curves based on the full $P(E)$ calculation as functions of the shunt capacitance $C$. The red and green lines are reproduced on this graph from the main figure.

Figure 4

(a) Scanning electron micrographs of the SINIS turnstiles. (b) Subgap $IV$ curves of the measured transistors in the gate-open state (charge degeneracy). The slope of the linear fit corresponds to the leakage of $0.5\times {10}^{-6}$ for the sample with the ground plane (filled circles) and $50\times {10}^{-6}$ for the sample without the ground plane (open diamonds) in units of the asymptotic conductance of each SET. (c) Current through the turnstile on the ground plane as a function of the amplitude of the applied sinusoidal gate drive at $f=10\mathrm{MHz}$. The gate offset was set to the charge degeneracy point, and the bias voltage was varied uniformly between $V_b=140$ and $290\mu \mathrm{V}$. (d) Current at the first plateau as a function of $V_b$ obtained from data similar to those in (c) (filled circles) showing leakage of $2\times {10}^{-6}$ and for the sample without the ground plane (open diamonds) with leakage of $100\times {10}^{-6}$ and a reduced step width.