$InSitu$ Reduction of Charge Noise in $\mathrm{GaAs}/{\mathrm{Al}}_x{\mathrm{Ga}}_{1-x}\mathrm{As}$ Schottky-Gated Devices

We show that an insulated electrostatic gate can be used to strongly suppress ubiquitous background charge noise in Schottky-gated $\mathrm{GaAs}/\mathrm{AlGaAs}$ devices. Via a 2D self-consistent simulation of the conduction band profile we show that this observation can be explained by reduced leakage of electrons from the Schottky gates into the semiconductor through the Schottky barrier, consistent with the effect of “bias cooling.” Upon noise reduction, the noise power spectrum generally changes from Lorentzian to $1/f$ type. By comparing wafers with different Al content, we exclude that $DX$ centers play a dominant role in the charge noise.

Figure 1

(a) QPC pinch-off traces (two terminal, $V_{SD}=0.8\mathrm{mV}$, $T=40\mathrm{mK}$). The operating point is marked. Wafer DLF1, see Table . Inset: a Scanning Electron Micrograph of a typical device layout before deposition of the insulated top gate. (b) QPC time traces for indicated gate voltages, offset for clarity. (c) Power spectra $S_I(f)$ from FFT of time traces; setup noise background $S_{I;BG}(f)$ recorded at zero $V_{SD}$. (d) Equivalent gate voltage noise $\Delta V_{EG}$. (e) Measured trapping rate ${\Gamma }_{\mathrm{in}}$ extracted from time traces as in (b), but for a different QPC.

Figure 2

(a) Simulated 2D device structure with ${\mathrm{Al}}_{0.26}{\mathrm{Ga}}_{0.74}\mathrm{As}$ doped- and spacer layer. Si doping $n_{\mathrm{Si}}=0.3\times {10}^{18}{\mathrm{cm}}^{-3}$; Calixarene simulated as ${\mathrm{SiO}}_2$ with ${\epsilon }_r=7.1$. (b) Simulated $U_C(z)$ under the Schottky gate at $x=300\mathrm{nm}$. Tunneling into a localized trap with fixed energy below $U_C$ occurs most easily from the quasi-Fermi level in the metal lead (${\mu }_m$) where the barrier is lowest (this is generally an inelastic process). (c) Quiver plot of the simulated electric field and equipotential lines near the Schottky gate (gray shaded) for the indicated voltage configurations.

Figure 3

Effect of BC on charge noise for uniform doping (REG1-3, upper panel) and delta doping (REG4-6, lower panel). Noise levels calculated using Eq. (1), the color of the data points codes for the local spectral slope $S_I(f)\propto f^{-\beta }$. The insets show the observed shift in operation voltage $V_G$, at given $V_{BC}$. Each point is averaged over two devices. $T=4.2\mathrm{K}$.