Towards Boolean operations with thermal photons

The Boolean algebra is the natural theoretical framework for a classical information treatment. The basic logical operations are usually performed using logic gates. In this Rapid Communication we demonstrate that not, or, and and gates can be realized exploiting the near-field radiative interaction in $N$-body systems with phase change materials. With the recent development of a photon thermal transistor and thermal memory, this result paves the way for a full information treatment and smart solutions for active thermal management at nanoscale with photons.

Figure 1

(a) Radiative not gate made with a ${\mathrm{SiO}}_2/{\mathrm{VO}}_2/{\mathrm{SiO}}_2$ plane thermal transistor. The source (S) is assumed semi-infinite, while the gate (G) and the drain (D) have a thickness of 100 nm. The separation distances are $d=100$ nm. The temperature $T_{\text{G}}$ of the gate defines the input and the drain temperature sets the gate output. In the operating range of the gate around the critical temperature $T_{\text{c}}$ of the gate, if $T_{\text{D}}<T_{\text{min}}$ the gate is in the thermal state “0”. On the contrary, when $T_{\text{D}}>T_{\text{max}}$ the gate is in the state “1”. The rectangular function represents the ideal response of the gate in its operating range. (b) Truth table for the ideal not gate.

Figure 2

(a) Radiative or gate made with a ${\mathrm{VO}}_2/{\mathrm{VO}}_2$ /${\mathrm{SiO}}_2$ thermal transistor. The source (S) is assumed semi-infinite, while the gate (G) and the drain (D) have a thickness of 100 nm. The separation distances are $d=100$ nm. The two temperatures $T_{\text{S}}$ and $T_{\text{G}}$ define the inputs and the drain temperature sets the gate output. The operating range of the or gate is delimited by a dashed rectangular domain centered at $(T_{\text{S}},T_{\text{G}})=(T_{\text{c}},T_{\text{c}})$ with $T_{\text{c}}=340\text{K}$. The threshold temperatures are $T_{\text{min}}=337.4\text{K}$ and $T_{\text{max}}=339.3\text{K}$ (b) Truth table for the ideal or gate.

Figure 3

(a) Radiative and gate made with a double ${\mathrm{SiO}}_2$ gate thermal transistor, the source being made in ${\mathrm{SiO}}_2$ and the drain in ${\mathrm{VO}}_2$. The source (S) is assumed semi-infinite, while both gates (G1, G2) and the drain (D) have a thickness of 250 and 500 nm, respectively. The separation distances are $d=100$ nm and the gates are assumed isolated one from the other. The color map represents the output $T_{\text{D}}$ with respect to the two input temperatures $T_{\text{G}1}$ and $T_{\text{G}2}$, the temperatures of two gates. The operating range of the and gate is delimited by a dashed rectangular domain centered at $(T_{\text{G}1},T_{\text{G}2})=(T_l,T_l)$ with $T_l=332.2\text{K}$. (b) Truth table for the ideal and gate.

Figure 4

Thermal relaxation of the drain in a ${\mathrm{SiO}}_2/{\mathrm{VO}}_2/{\mathrm{SiO}}_2$ not gate with the geometrical parameters identical as in Fig. 1. The red solid (respectively, blue dashed) line shows the time evolution of the drain temperature from the state “0” (respectively, “0”) to the state “1” (respectively, “0”) when the initial temperature is $T_{\text{D}}\left(0\right)=337\text{K}$ [respectively, $T_{\text{D}}\left(0\right)=348\text{K})$. The gate temperature is assumed fixed at $T_{\text{G}}=343\text{K}$ (respectively, $T_G=337\text{K})$ and the consign temperatures are $T_{\text{min}}=344\text{K}$ and $T_{\text{max}}=345\text{K}$. The inset shows the stability diagram of solutions for both transitions between the state “0” and the state “1”.