Quasiparticle current along the $c$ axis in junctions involving $d$-wave superconductors partially gapped by charge density waves

Quasiparticle tunnel current either between identical $d$-wave superconductors partially gapped by charge density waves (SCDWs) or between an SCDW and a normal metal was calculated. The cases of unidirectional and checkerboard CDWs were considered. The tunnel conductance was found in both cases to possess a number of peculiarities, which cannot be described by introducing a single combined gap. The results are in qualitative agreement with experimental data obtained for a number of cuprates by the scanning tunnel spectroscopy, intrinsic-tunneling, and break-junction measurements. The difference between the experiment and the theory seems to stem from the spread of gap values occurring due to the intrinsic spatial inhomogeneity of nonstoichiometric oxides and reflected in the cuprate tunnel spectra.

Figure 1

Schematic diagrams for the parent order parameters of the $d$-wave superconductor partially gapped by charge-density waves (CDWs) at the temperature $T=0$. The dashed curve describes the alternating-sign $\overline{\mathrm{\Delta }}\left(\theta \right)$ function for the parent $d$-wave superconductor (dBCS), and the solid curve the $\overline{\mathrm{\Sigma }}\left(\theta \right)$ dependence for the parent partially gapped metal. The angle $\theta$ is reckoned counterclockwise from the ${\mathbf{k}}_x$ direction in the momentum space. The relative orientation of the $\overline{\mathrm{\Delta }}\left(\theta \right)$ and $\overline{\mathrm{\Sigma }}\left(\theta \right)$ profiles correlates with that for cuprates (the $d_{x^2-y^2}$-wave symmetry). There are $N=4$ CDW-gapped Fermi surface (FS) sections in the case of checkerboard CDW pattern, and $N=2$ (hatched) gapped sections in the case of unidirectional CDWs. $2\alpha$ is the angular width of each CDW sector.

Figure 2

(a) Phase diagram ${\sigma }_0-\alpha$ for the partially CDW-gapped $d$-wave superconductor (SCDW) at the temperature $T=0$. Here, ${\sigma }_0={\mathrm{\Sigma }}_0/{\mathrm{\Delta }}_0$, where ${\mathrm{\Sigma }}_0$ and ${\mathrm{\Delta }}_0$ are the magnitudes of the zero-$T$ parent order parameters. The upper area ($\alpha >{45}^{\circ }$) makes sense only for $N=2$, whereas the lower one is the same for $N=4$ and $N=2$. The solid curve separates the region where the SCDW is the dBCS from the region where superconductivity and CDWs coexist. In the hatched region between the solid and dotted boundaries, the CDW-reentrance phenomenon takes place at $T>0$. Concerning representative points A–E and the dashed curve, see explanations in the text. (b) Possible types of $\delta \left(\tau \right)$ and $\sigma \left(\tau \right)$ dependencies for various SCDW parameter sets. Here, $\delta =\mathrm{\Delta }/{\mathrm{\Delta }}_0$ and $\sigma =\mathrm{\Sigma }/{\mathrm{\Delta }}_0$ are normalized superconducting $\mathrm{\Delta }$, and dielectric $\mathrm{\Sigma }$, actual order parameters, and $\tau =T/T_c$ is the temperature normalized by the actual superconducting critical temperature $T_c$. $T_r$ and $T_s$ denote the temperature interval of CDW existence. (c)–(e) Gap roses in the momentum space for the SCDWs (solid curves) and the relative dBCSs (dashed curves; see explanations in the text) corresponding to parameter sets A–C [see (a)]. The feature points are indicated (see notations in the text).

Figure 3

Cartesian representation of the gap rose shown in Fig. 2. $\overline{D}$ is the combined energy gap. Tinted regions I and II mark relevant intervals of integration over $\theta$ while calculating the electron density of states (DOS).

Figure 4

The same as in Fig. 3, but for the gap rose in Fig. 2.

Figure 5

Temperature evolution of normalized quasiparticle conductance-voltage characteristics (CVCs) $g\left(v=\frac{eV}{{\mathrm{\Delta }}_0}\right)=R\frac{dJ}{dV}$ for the $c$-axis quasiparticle tunnel current $J$ in nonsymmetric (a) and symmetric (b) tunnel junctions involving the dBCS electrode(s). Here, $e$ is the elementary charge, $V$ the bias voltage, and $R$ the junction resistance in the normal state.

Figure 6

Normalized CVCs for tunnel junctions between the SCDW with the representative parameter set A (solid curve) or the related dBCS (dashed curve) and the normal electrode (the nonsymmetric junction) at $T=0$. Vertical dotted lines mark the positions of CVC peculiarities ${\mathrm{\Delta }}_a<D_{\alpha }<D_0$. For comparison, the corresponding DOS (in arbitrary units) is shown by the dotted curve.

Figure 7

Modifications of the CVC for the nonsymmetric junction with SCDW parameter set A induced by changing (a) parameter ${\sigma }_0$ and (b) parameter $\alpha$, at $T=0$.

Figure 8

Temperature evolution of (a) CVCs for the nonsymmetric junction with SCDW parameter set A and (b) the corresponding CVC peculiarities.

Figure 9

Temperature evolution of CVCs (a) and (c), and the corresponding CVC peculiarities (b) and (d) for the nonsymmetric junctions with SCDW parameter sets D (a) and (b) and E (c) and (d).

Figure 10

The same as in Fig. 6, but for SCDW parameter set B. Vertical dotted lines mark the positions of CVC peculiarities ${\mathrm{\Delta }}_a<D_{\alpha }<{\mathrm{\Delta }}_{{90}^{\circ }}<D_0$.

Figure 11

The same as in Fig. 7, but for SCDW parameter set B.

Figure 12

The same as in Fig. 8, but for SCDW parameter set B.

Figure 13

The same as in Fig. 6, but for SCDW parameter set C. Vertical dotted lines mark the positions of CVC peculiarities ${\mathrm{\Delta }}_a<{\mathrm{\Delta }}_{{90}^{\circ }}<D_{{45}^{\circ }}<D_{\alpha }<D_0$.

Figure 14

The same as in Fig. 7, but for SCDW parameter set C.

Figure 15

The same as in Fig. 8, but for SCDW parameter set C.

Figure 16

The same as in Fig. 6, but for the symmetric junction.

Figure 17

The same as in Fig. 7, but for the symmetric junction.

Figure 18

Temperature evolution of (a) CVCs for the symmetric junction with SCDW parameter set A and (c) the corresponding CVC peculiarities. (b) Scaled-up CVC sections near the zero-bias voltage.

Figure 19

The same as in Fig. 18, but for SCDW parameter set D.

Figure 20

The same as in Fig. 18, but for SCDW parameter set E.

Figure 21

The same as in Fig. 16, but for SCDW parameter set B.

Figure 22

The same as in Fig. 17, but for SCDW parameter set B.

Figure 23

The same as in Fig. 18, but for SCDW parameter set B.

Figure 24

The same as in Fig. 16, but for SCDW parameter set C.

Figure 25

The same as in Fig. 17, but for SCDW parameter set C.

Figure 26

The same as in Fig. 18, but for SCDW parameter set C.