Unit cell restricted Bloch functions basis for first-principle transport models: Theory and application

We present the theory and the application of a first-principle transport model employing a basis set obtained directly from the ab initio Bloch functions. We use a plane-wave density functional theory Hamiltonian and show that a judicious choice of the reduced basis set can effectively suppress the potentially thorny problem of the unphysical solutions. Our methodology enables ab initio transport simulations with a huge reduction of the size of the problem compared to the original ab initio formulation. Moreover, the approach can also be used for local and nonlocal empirical pseudopotential Hamiltonians, thus promising a wide range of possible applications. We report results for ab initio simulations of ${\mathrm{MoS}}_2$ field effect transistors, where the transport and electrostatics equations are solved self-consistently for channel lengths up to about 20 nanometers. The simulation results rapidly converge with the size of the basis set, so that the blocks of the Hamiltonian matrix can be reduced to a size below 100. Our methodology is a viable approach for ab initio and semiempirical quantum transport simulations and, in particular, it offers an alternative to the use of maximally localized Wannier functions.

Figure 1

Left: Cross section and the top view of the unit cell for the single-layer ${\mathrm{MoS}}_2$ employed in this work. Right: Electronic structure for the single-layer ${\mathrm{MoS}}_2$ vs $k_x$ and for $k_y=0$. Ab initio calculations (solid lines) are compared to results obtained by using Eq. (16) in the hybrid $x{\mathbf{K}}_{yz}$ basis (diamonds).

Figure 2

Absolute energy difference $\mathrm{\Delta }E$ between the electronic structure calculated either in the hybrid $x{\mathbf{K}}_{yz}$ basis [i.e., Eq. (16) with $\left[{\mathbf{H}}_{0,0}\right], \left[{\mathbf{H}}_{0,1}\right]$ blocks] or in the reduced basis [i.e., Eq. (16) with ${\left[{\mathbf{H}}_{0,0}\right]}_{\mathrm{\Phi }}, {\left[{\mathbf{H}}_{0,1}\right]}_{\mathrm{\Phi }}$ blocks]. (a) $\mathrm{\Delta }E$ for reduced basis calculations obtained with two $k_x$ values (i.e., $k_x$=0, $\pi /a_x$) and different number $N_E$ of basis functions at each $k_x$. (b) Same as (a), but for reduced basis calculations obtained with four $k_x$ values (i.e., $k_x$=0, $\pm 0.5\pi /a_x, \pi /a_x$).

Figure 3

Left: Sketch of the single-gate MOSFET simulated in this work and consisting of a single-layer ${\mathrm{MoS}}_2$ channel material. The length of the source and drain extensions is $L_S=L_D\simeq 9$ nm and $L_G$ indicates the top gate length. Right: Simulated drain current ${\text{I}}_{DS}$ vs top gate voltage $V_{TG}$ characteristics at ${\text{V}}_{DS}=0.6$ V for $n$-type ${\mathrm{MoS}}_2$ MOSFETs featuring different gate lengths $L_G\simeq 20$, 10, and 5 nm. The ${\text{I}}_{DS}$ curves reported in semilogarithmic scales have been $V_{TG}$ shifted so as to have the same ${\text{I}}_{DS}=1$ $\mu \mathrm{A}/\mu \mathrm{m}$ at $V_{TG}=0$ V for all gate lengths, whereas the curves in the linear scales have not.

Figure 4

Color map of the current density spectrum and profile of the lowest conduction band at $k_y=0$ (red line) for a single-layer ${\mathrm{MoS}}_2$ MOSFET having a gate length of either $L_G\simeq$ 5 nm (left) or 10 nm (right). Both devices have ${\text{V}}_{DS}=0.6$ V and a gate bias corresponding to approximately the same subthreshold current ${\text{I}}_{DS}\simeq 5$ nA/$\mu \mathrm{m}$.

Figure 5

Self-consistently calculated drain current for the $L_G=$ 10 nm single-layer ${\mathrm{MoS}}_2$ MOSFET sketched in Fig. 3 (left) for the bias point corresponding to $V_{TG}=0.6$ V and ${\text{V}}_{DS}=0.6$ V, and plotted vs the number $N_B$ of reduced basis functions. The right $y$ axis reports the corresponding wall-clock simulation time. For this specific bias point, 11 iterations were necessary to obtain the self-consistent solution of the Poisson-NEGF equations. Calculations were performed by using a parallelization of the energy points over 10 cores (Intel Xeon Gold 6150 CPU at 2.70 GHz).