Compliance-Current Manipulation of Dual-Filament Switching in a $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{In}\text{−}\mathrm{Sn}\text{−}\mathrm{O}$ Structure with an Ultralow Power Consumption

A continual change in resistance plays an important role in simulating the biological synapses and an abrupt switching mode helps to store information with fast speed and low-power operation. The manipulation of dual-mode switching and comprehension of switching mechanisms, which are the key to developing multifunctional resistance random access memory devices, has made little progress due to the complexity of the influencing factors. We observe that both gradual and abrupt reset behaviors exist in the $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{In}\text{−}\mathrm{Sn}\text{−}\mathrm{O}$ (ITO) structure, and the utilization of various compliance currents ($I_{\mathrm{CC}}$) can control the reset processes of the device. The difference in switching behavior is a result of the different compositions of the conductive filaments (CFs). $\mathrm{Ta}$ and oxygen-vacancy dual filaments contribute to resistive switching at low $I_{\mathrm{CC}}$, whereas the change in valence states of ${\mathrm{Ta}\mathrm{O}}_x$ dominates the formation and rupture of CFs at high $I_{\mathrm{CC}}$. The introduction of a thin ${\mathrm{Mo}\mathrm{S}}_2$ intermediate layer also leads to a transition between abrupt- and gradual-switching modes. The $\mathrm{Ta}/{\mathrm{Mo}\mathrm{S}}_2/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{ITO}$ device exhibits digital switching behavior with ultralow power consumption. Moreover, the $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/{\mathrm{Mo}\mathrm{S}}_2/\mathrm{ITO}$ device with an analog reset process can be applied to realize synaptic functions.

Figure 1

(a) Schematic structure of the ${\mathrm{Ta}}_2{\mathrm{O}}_5$-based device. (b) Cross-section scanning SEM image of the $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{ITO}$ device.

Figure 2

(a) I-V curves of $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{ITO}$ samples with two switching processes. Inset shows (left) gradual resistive behavior with various voltages and (right) abrupt resistive behavior with various voltages. Corresponding slope fittings in double-logarithmic coordinates for (b) the gradual process and (c) for the abrupt process. (d) Resistive-switching behaviors under different compliance currents, and inset shows the resistance values at LRS and HRS at different I_CC. (e) Temperature-dependent resistance change at LRS under different I_CC. Inset shows linearly fitted resistance-temperature coefficients (α) of 0.1 mA.

Figure 3

Schematic illustration of the CF mechanism at (a) 0.1 mA, (b) 1 mA, (c) 10 mA. (d) Rupture of CFs during the reset process.

Figure 4

(a) I-V characteristics and (b) temperature-dependence coefficient in the LRS of $\mathrm{Ta}/{\mathrm{Mo}\mathrm{S}}_2/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{ITO}$. Inset shows I-V characteristics at 10 µA. (c) I-V characteristics and (d) temperature-resistance characteristics in both HRS and LRS of $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/{\mathrm{Mo}\mathrm{S}}_2/\mathrm{ITO}$.

Figure 5

Schematic illustration of CF (a) growth and (b) rupture in the bipolar switching $\mathrm{Ta}/{\mathrm{Mo}\mathrm{S}}_2/{\mathrm{Ta}}_2{\mathrm{O}}_5/\mathrm{ITO}$ memory device. (c) CF growth and (d) rupture of $\mathrm{Ta}/{\mathrm{Ta}}_2{\mathrm{O}}_5/{\mathrm{Mo}\mathrm{S}}_2/\mathrm{ITO}$.

Figure 6

(a) Endurance performance of S1 and S2 devices. (b) Cumulative probability of switching voltages. (c) Retention times of LRS and HRS.