Theoretical analysis of a realistic atom-chip quantum gate

We present a detailed, realistic analysis of the implementation of a proposal for a quantum phase gate based on atomic vibrational states, specializing it to neutral rubidium atoms on atom chips. We show how to create a double-well potential with static currents on the atom chips, using for all relevant parameters values that are achieved with present technology. The potential barrier between the two wells can be modified by varying the currents in order to realize a quantum phase gate for qubit states encoded in the atomic external degree of freedom. The gate performance is analyzed through numerical simulations; the operation time is $\sim 10\mathrm{ms}$ with a performance fidelity above 99.9%. For storage of the state between the operations the qubit state can be transferred efficiently via Raman transitions to two hyperfine states, where its decoherence is strongly inhibited. In addition we discuss the limits imposed by the proximity of the surface to the gate fidelity.

Figure 1

(Color online) Schematic view of the atom-chip configuration. The two wires along the $y$ axis lie on the chip surface and are separated from the quadrupole wire by $200\mathrm{nm}$. Height and width of the wires are $H=200\mathrm{nm}$ and $W=700\mathrm{nm}$, respectively. Wires this size are fabricated with current technology.

Figure 2

(Color online) Double-well potentials created by the atom-chip configuration shown in Fig. 1. The energies of the first six eigenstates are shown as red (horizontal) lines. The blue (dashed) line represents the wave function of the third eigenstate labeled as $1_{\mathrm{S}}$ because it originates from the symmetric combination of the $v=1$ trapped levels, also labeled as $\mid e⟩$ in the text. (a) Highest barrier $\xi ∕2\pi =35.4\mathrm{kHz}$ obtained with $I_0=40.89\mathrm{mA}$ and $\alpha =70.25\times {10}^{-3}$. (b) Lowest barrier $\xi ∕2\pi =14.4\mathrm{kHz}$ obtained with $I_0=42.01\mathrm{mA}$ and $\alpha =69.70\times {10}^{-3}$. In both cases the bias magnetic fields are equal to $B_{0x}=-9.90\mathrm{G}$, and $B_{0y}=50.0\mathrm{G}$.

Figure 3

(Color online) (a) Variation of the dc current $I_0\left(t\right)$ (red lines) in the quadrupole wire and of $\alpha \left(t\right)=I_1\left(t\right)∕I_0\left(t\right)=I_2\left(t\right)∕I_0\left(t\right)$ (blue lines) during the gate operation. The solid lines correspond to a simple linear gate and the dashed lines represent an optimized gate (see text for details). (b) Variation of the barrier height $\xi \left(t\right)$ (green, dashed line) and of the energies of the first six instantaneous eigenstates of the double-well potential (solid lines) in the case of the optimized gate. The times $T_0$, $(T_0+T_1)$, and $(2T_0+T_1)$ delimit the three steps which constitute the conditional $\pi$ phase gate.

Figure 4

(Color online) Infidelity of the conditional phase gate as a function of the gate duration. The red and blue lines correspond to the infidelities calculated for the linear and optimized gates, respectively (see Fig. 3 and text for details). Even though the calculation corresponds to specific values for the gate geometry given in Fig. 1, it is representative for that setup and we verified that modifying features such as wire thickness and width changes only marginally the infidelity.

Figure 5

(Color online) Schematic representation of the hyperfine structure of the $5S_{1∕2}$ and $5P_{1∕2}$ states of ${}^{87}\mathrm{Rb}$. The two qubits $\mid 0⟩\equiv \mid F=2,m_F=1⟩$ and $\mid 1⟩\equiv \mid F=1,m_F=-1⟩$ of the $5S_{1∕2}$ ground state are shown in red. The intermediate sublevels $\mid A⟩$, $\mid B⟩$, $\mid C⟩$, and $\mid D⟩$ of the $5P_{1∕2}$ excited state are shown in blue. The ${\sigma }_{+}$ and ${\sigma }_{-}$ transitions connecting them are shown with dotted (orange) and dash-dotted (green) arrows, respectively.