• Open Access

Achieving Fault Tolerance on Capped Color Codes with Few Ancillas

Theerapat Tansuwannont and Debbie Leung
PRX Quantum 3, 030322 – Published 11 August 2022

Abstract

Attaining fault tolerance while maintaining low overhead is one of the main challenges in a practical implementation of quantum circuits. One major technique that can overcome this problem is the flag technique, in which high-weight errors arising from a few faults can be detected by a few ancillas and distinguished using subsequent syndrome measurements. The technique can be further improved using the fact that, for some families of codes, errors of any weight are logically equivalent if they have the same syndrome and weight parity, as shown in our previous work [Tansuwannont and Leung, Phys. Rev. A 104, 042410 (2021)]. In this work, we develop a notion of distinguishable fault set that captures both concepts of flags and weight parities, and extend the use of weight parities in error correction to families of capped and recursive capped color codes. We also develop fault-tolerant protocols for error correction, measurement, state preparation, and logical T-gate implementation via code switching, which are sufficient for performing fault-tolerant Clifford computation on a capped color code, and performing fault-tolerant universal quantum computation on a recursive capped color code. Our protocols for a capped or a recursive capped color code of any distance require only two ancillas, assuming that the ancillas can be reused. The concept of distinguishable fault set also leads to a generalization of the definitions of fault-tolerant gadgets proposed by Aliferis, Gottesman, and Preskill.

  • Figure
  • Figure
  • Figure
  • Figure
  • Figure
  • Figure
  • Figure
8 More
  • Received 12 December 2021
  • Revised 27 May 2022
  • Accepted 21 June 2022

DOI:https://doi.org/10.1103/PRXQuantum.3.030322

Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.

Published by the American Physical Society

Physics Subject Headings (PhySH)

Quantum Information, Science & Technology

Authors & Affiliations

Theerapat Tansuwannont1,2,* and Debbie Leung3,4,†

  • 1Institute for Quantum Computing and Department of Physics and Astronomy, University of Waterloo, Waterloo, Ontario N2L 3G1, Canada
  • 2Duke Quantum Center and Department of Electrical and Computer Engineering, Duke University, Durham, North Carolina 27708, USA
  • 3Institute for Quantum Computing and Department of Combinatorics and Optimization, University of Waterloo, Waterloo, Ontario N2L 3G1, Canada
  • 4Perimeter Institute for Theoretical Physics, Waterloo, Ontario N2L 2Y5, Canada

  • *t.tansuwannont@duke.edu
  • wcleung@uwaterloo.ca

Popular Summary

In quantum computation, errors in a quantum circuit arising from its interaction with the environment are one of the biggest obstacles to building large-scale quantum computers. To deal with such errors, we can simulate a quantum circuit using a fault-tolerant error-correction gadget, a method that suppresses error propagation, together with other gadgets for quantum computation. However, achieving a fault-tolerant simulation with low logical error rate can require a large number of additional qubits.

In this work, we develop fault-tolerant gadgets for error correction and quantum computation on certain quantum error correcting codes with promising properties. For the code that can correct up to any number of faults, our protocols require only two additional qubits. Our schemes rely on two techniques: the flag technique that uses a few additional qubits to detect faults, leading to high-weight errors, and the weight parity technique that significantly simplifies the error identification for some codes. A notion of distinguishable fault set that unifies both aforementioned techniques for handling high-weight errors is developed in this work. This notion also leads to a generalization of fault-tolerant gadgets that gives more flexibility when designing fault-tolerant protocols.

In our development, the structure of all circuits involved in fault-tolerant protocols is crucial for achieving fault tolerance with few additional qubits; therefore, all protocols must be designed in tandem. We hope that our protocol designs can be extended to reduce the qubit requirements for other codes.

Key Image

Article Text

Click to Expand

References

Click to Expand
Issue

Vol. 3, Iss. 3 — August - October 2022

Reuse & Permissions
Author publication services for translation and copyediting assistance advertisement

Authorization Required


×
×

Images

×

Sign up to receive regular email alerts from PRX Quantum

Reuse & Permissions

It is not necessary to obtain permission to reuse this article or its components as it is available under the terms of the Creative Commons Attribution 4.0 International license. This license permits unrestricted use, distribution, and reproduction in any medium, provided attribution to the author(s) and the published article's title, journal citation, and DOI are maintained. Please note that some figures may have been included with permission from other third parties. It is your responsibility to obtain the proper permission from the rights holder directly for these figures.

×

Log In

Cancel
×

Search


Article Lookup

Paste a citation or DOI

Enter a citation
×