Impurity conduction in phosphorus-doped buried-channel silicon-on-insulator field-effect transistors at temperatures between 10 and $295\mathrm{K}$

We investigate transport in phosphorus-doped buried-channel metal-oxide-semiconductor field-effect transistors at temperatures between 10 and $295\mathrm{K}$. We focus on transistors with phosphorus donor concentrations higher than those previously studied, where we expect conduction to rely on donor electrons rather than conduction-band electrons. In a range of doping concentration between around 2.1 and $8.7\times {10}^{17}{\mathrm{cm}}^{-3}$, we find that a clear peak emerges in the conductance versus gate-voltage curves at low temperature. In addition, temperature dependence measurements reveal that the conductance obeys a variable-range-hopping law up to an unexpectedly high temperature of over $100\mathrm{K}$. The symmetric dual-gate configuration of the silicon-on-insulator we use allows us to fully characterize the vertical-bias dependence of the conductance. Comparison to computer simulation of the phosphorus impurity band depth profile reveals how the spatial variation of the impurity-band energy determines the hopping conduction in transistor structures. We conclude that the emergence of the conductance peak and the high-temperature variable-range hopping originate from the band bending and its change by the gate bias. Moreover, the peak structure is found to be strongly related to the density of states (DOS) of the phosphorus impurity band, suggesting the possibility of performing a spectroscopy for the DOS of phosphorus, the dopant of paramount importance in Si technology, through transport experiments.

Figure 1

(Color online) (a) Cross-sectional and (b) top views of the MOSFET, and (c) and (d) schematic illustrations of the band diagrams near the conduction-band edge (not based on simulations). The gate length and width are 14 and $10\mu \mathrm{m}$, respectively. The voltages to the front and back gate are denoted by $V_{\mathrm{fg}}$ and $V_{\mathrm{bg}}$, respectively. In (c) and (d), both the conduction-band edge and the impurity band are drawn. Dotted horizontal lines show the Fermi level of the source. Dots and crosses represent electrons and positively charged donors, respectively. Figure 1c illustrates the case where both $V_{\mathrm{fg}}$ and $V_{\mathrm{bg}}$ are negative. Due to positively charged donors around the front and back interface regions, the band is U-shaped. The transport relies on electrons in the impurity band. Figure 1d illustrates the case where the front gate is positively biased. The surface channel is formed at the front interface.

Figure 2

(Color online) Conductance characteristics for a MOSFET with $N_d=8.7\times {10}^{17}{\mathrm{cm}}^{-3}$, measured at $12\mathrm{K}$. (a) Conductance as a function of the front-gate voltage for three back-gate voltages, (b) gray-scale image of the conductance in the $V_{\mathrm{fg}}-V_{\mathrm{bg}}$ plane, and (c) experimental (dots) and simulated (line) surface-channel threshold voltage in the $V_{\mathrm{fg}}-V_{\mathrm{bg}}$ plane. In (b), the gray scale was cycled twice in the displayed conductance window, ${10}^{-10}–{10}^{-4}\mathrm{S}$, in order to accentuate the sharp rising part of the conductance by the white curve. In (c), the buried-channel region is also indicated.

Figure 3

(Color online) Temperature dependence of $G\left(V_{\mathrm{fg}}\right)$ curve for a MOSFET with $N_d=8.7\times {10}^{17}{\mathrm{cm}}^{-3}$.

Figure 4

(Color online) (a) Conductance as a function of $T^{-1∕4}$ and (b) the fitting error as a function of the exponent $p$, for a MOSFET with $N_d=8.7\times {10}^{17}{\mathrm{cm}}^{-3}$.

Figure 5

(Color online) Conductance as a function of $T^{-1∕4}$ for (a) $V_{\mathrm{bg}}=-8\mathrm{V}$ and (b) $V_{\mathrm{bg}}=0\mathrm{V}$.

Figure 6

(Color online) (a) The $V_{\mathrm{fg}}$ dependence of the characteristic temperature $T_0$ and (b) the DOS at the Fermi level.

Figure 7

(Color online) Simulated depth profile of the P impurity level relative to the Fermi level, at $11\mathrm{K}$. Voltage points for the calculation are shown in (a). Graphs (b) and (c) correspond to the back-gate voltage of $-8$ and $1\mathrm{V}$, respectively. Depth profiles in (d) correspond to the back-gate voltages of 10 and $-40\mathrm{V}$. Two dashed horizontal lines in each figure (b)–(d) define the mean hopping energy at $11\mathrm{K}$.

Figure 8

(Color online) Conductance as a function of the front-gate voltage for MOSFETs with (a) $N_d=1.2\times {10}^{17}{\mathrm{cm}}^{-3}$ and (b) $N_d=3.7\times {10}^{18}{\mathrm{cm}}^{-3}$. For both sets of data, the back-gate voltage was kept at $0\mathrm{V}$.

Figure 9

(Color online) (a) Conductance as a function of the inverse temperature for MOSFETs with three different $N_d$’s and (b) the activation energy $E$ as a function of $V_{\mathrm{fg}}$ for the MOSFET with $N_d=1.2\times {10}^{17}{\mathrm{cm}}^{-3}$. In (a), all three curves were obtained with the back-gate voltage kept at $0\mathrm{V}$. The front-gate voltages were $-0.65$, $-4.0$, and $-10\mathrm{V}$ for curves I–III, respectively.