Superconductor-insulator crossover in Josephson junction arrays due to reduction from two to one dimension

We investigated the dimensionality effect on electrical properties of small-capacitance Josephson junction arrays (JJAs). A one-dimensional JJA and several two-dimensional JJAs with different array widths were fabricated on a substrate simultaneously so that they would have nominally the same junction parameters. As the array width decreases, the current-voltage characteristics show a crossover from a superconducting behavior with a dc Josephson-current-like branch to an insulating one with a Coulomb blockade gap of Cooper pairs. The superconductor-insulator crossover is explained in terms of enhanced quantum fluctuations of superconducting phase variables due to a dimensional reduction.

Figure 1

(a) Scanning electron micrograph of part of Josephson junction arrays (JJAs) with widths of $W=1$ and $W=4$. (b) Layout for fabricated JJAs. (c) Schematic of JJAs. Small JJAs are shown for clarity.

Figure 2

The zero-bias resistances are plotted vs temperature for JJAs having the same length of $L=48$ but with varying width, $W$. $W∕L$ times zero-bias resistances $R_0$ of JJAs are plotted.

Figure 3

$I\text{−}V$ characteristics of JJAs with the same length of $L=48$ but with varying width, $W$. $I$ is the total current through JJA and $V$ is the total voltage across JJA.

Figure 4

(a) The zero-bias resistance is plotted vs magnetic field at three temperatures for $W=40$ JJA. (b) $I\text{−}V$ characteristics of $W=40$ JJA at a minimum and maximum value of $E_J$.

Figure 5

$I\text{−}V$ characteristics of $W=8$ JJA at eight different temperatures separated by $100\mathrm{mK}$. Inset: Log-log scale plot.

Figure 6

Scaled $I\text{−}V$ curves for JJAs with $W=4$, 8, and 40. $I\text{−}V$ curves at $T=0.79\mathrm{K}$ were measured in ranges $\alpha V∕\left(W{R}_0\right)\le 2.1$, 2.2, and $2.7\mathrm{nA}$ for $W=4$, 8, and 40, respectively, but $I\text{−}V$ curves at other temperatures cover full range of horizontal axis. Inset: Log-log scale plot.

Figure 7

The scaling factor $\alpha$ in Fig. 6 is plotted vs temperature. Inset: $\alpha$ as a function of $(R_{0}W∕L{)}^{0.5}∕T$. The solid line represents the slope of unity.

Figure 8

Calculated capacitance between two islands $i$ and $j$, $-\{\mathit{C}{\}}_{ij}$, is plotted vs distance between the islands for $24\times 1$, $24\times 2$, $24\times 4$, and $24\times 8$ JJAs. JJAs have $H$-shaped islands with a size of $2\mathrm{\mu }\mathrm{m}\times 2\mathrm{\mu }\mathrm{m}$ and a thickness of $50\mathrm{nm}$, which are approximately the same as those in actual JJAs. They are placed in dielectric media $(k_{ϵ}=6.5)$. Capacitance for distance $4\mathrm{\mu }\mathrm{m}$ corresponds to the next-nearest-neighbor capacitance. Solid lines represent the slope of $-3$. (a) JJAs are isolated. (b) There are two $24\times 4$ JJAs on both sides of each JJA, separated by $2\mathrm{\mu }\mathrm{m}$, which is similar to conditions under which actual JJAs are placed.

Figure 9

Offset voltage $V_{off}=V-I\times dV∕dI$ for the normal state is plotted vs voltage. Inset: $V_{off}(V\to 0)$ is plotted vs array width $W$ (open circles). Dots represent calculated values of $48E_p∕e$ for $C=0.57\mathrm{fF}$ and $k_{ϵ}=6.5$. The solid line is a guide.